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| author | Eric Christopher <echristo@gmail.com> | 2014-06-10 22:34:31 +0000 |
|---|---|---|
| committer | Eric Christopher <echristo@gmail.com> | 2014-06-10 22:34:31 +0000 |
| commit | c6e5ff46be3c8d4a91a9d3dfe9c486991f19ef00 (patch) | |
| tree | 9323c98456e670477293ea33a92c44f30b1dc626 /lib/Target/X86/X86InstrInfo.h | |
| parent | c72fe200addad20664175c26784ff8695ce5de00 (diff) | |
| download | llvm-c6e5ff46be3c8d4a91a9d3dfe9c486991f19ef00.tar.gz llvm-c6e5ff46be3c8d4a91a9d3dfe9c486991f19ef00.tar.bz2 llvm-c6e5ff46be3c8d4a91a9d3dfe9c486991f19ef00.tar.xz | |
Remove the use of TargetMachine from X86InstrInfo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210596 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/X86/X86InstrInfo.h')
| -rw-r--r-- | lib/Target/X86/X86InstrInfo.h | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/lib/Target/X86/X86InstrInfo.h b/lib/Target/X86/X86InstrInfo.h index 3f2686cb69..18ee24a8e3 100644 --- a/lib/Target/X86/X86InstrInfo.h +++ b/lib/Target/X86/X86InstrInfo.h @@ -24,7 +24,7 @@ namespace llvm { class X86RegisterInfo; - class X86TargetMachine; + class X86Subtarget; namespace X86 { // X86 specific condition code. These correspond to X86_*_COND in @@ -129,7 +129,7 @@ inline static bool isMem(const MachineInstr *MI, unsigned Op) { } class X86InstrInfo final : public X86GenInstrInfo { - X86TargetMachine &TM; + X86Subtarget &Subtarget; const X86RegisterInfo RI; /// RegOp2MemOpTable3Addr, RegOp2MemOpTable0, RegOp2MemOpTable1, @@ -156,7 +156,7 @@ class X86InstrInfo final : public X86GenInstrInfo { virtual void anchor(); public: - explicit X86InstrInfo(X86TargetMachine &tm); + explicit X86InstrInfo(X86Subtarget &STI); /// getRegisterInfo - TargetInstrInfo is a superset of MRegister info. As /// such, whenever a client has an instance of instruction info, it should |