summaryrefslogtreecommitdiff
path: root/lib/Target/X86/X86InstrInfo.td
diff options
context:
space:
mode:
authorMon P Wang <wangmp@apple.com>2008-05-05 19:05:59 +0000
committerMon P Wang <wangmp@apple.com>2008-05-05 19:05:59 +0000
commit63307c335aa08b0d6a75f81d64d79af7e90eb78b (patch)
treeda7531194465dc141c0d26ff68d1989c462b2c89 /lib/Target/X86/X86InstrInfo.td
parent94bbdc8c254e259eff22eb5d6a1012fc1438fb45 (diff)
downloadllvm-63307c335aa08b0d6a75f81d64d79af7e90eb78b.tar.gz
llvm-63307c335aa08b0d6a75f81d64d79af7e90eb78b.tar.bz2
llvm-63307c335aa08b0d6a75f81d64d79af7e90eb78b.tar.xz
Added addition atomic instrinsics and, or, xor, min, and max.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50663 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/X86/X86InstrInfo.td')
-rw-r--r--lib/Target/X86/X86InstrInfo.td57
1 files changed, 57 insertions, 0 deletions
diff --git a/lib/Target/X86/X86InstrInfo.td b/lib/Target/X86/X86InstrInfo.td
index c539eca940..af61540361 100644
--- a/lib/Target/X86/X86InstrInfo.td
+++ b/lib/Target/X86/X86InstrInfo.td
@@ -2598,6 +2598,63 @@ def LXADD8 : I<0xC0, MRMSrcMem, (outs GR8:$dst), (ins i8mem:$ptr, GR8:$val),
TB, LOCK;
}
+// Atomic exchange and and, or, xor
+let Constraints = "$val = $dst", Defs = [EFLAGS],
+ usesCustomDAGSchedInserter = 1 in {
+def ATOMAND32 : I<0xC1, MRMSrcMem,(outs GR32:$dst),(ins i32mem:$ptr, GR32:$val),
+ "#ATOMAND32 PSUEDO!",
+ [(set GR32:$dst, (atomic_load_and addr:$ptr, GR32:$val))]>,
+ TB, LOCK;
+}
+
+let Constraints = "$val = $dst", Defs = [EFLAGS],
+ usesCustomDAGSchedInserter = 1 in {
+def ATOMOR32 : I<0xC1, MRMSrcMem, (outs GR32:$dst),(ins i32mem:$ptr, GR32:$val),
+ "#ATOMOR32 PSUEDO!",
+ [(set GR32:$dst, (atomic_load_or addr:$ptr, GR32:$val))]>,
+ TB, LOCK;
+}
+
+let Constraints = "$val = $dst", Defs = [EFLAGS],
+ usesCustomDAGSchedInserter = 1 in {
+def ATOMXOR32 : I<0xC1, MRMSrcMem,(outs GR32:$dst),(ins i32mem:$ptr, GR32:$val),
+ "#ATOMXOR32 PSUEDO!",
+ [(set GR32:$dst, (atomic_load_xor addr:$ptr, GR32:$val))]>,
+ TB, LOCK;
+}
+
+let Constraints = "$val = $dst", Defs = [EFLAGS],
+ usesCustomDAGSchedInserter = 1 in {
+def ATOMMIN32: I<0xC1, MRMSrcMem, (outs GR32:$dst), (ins i32mem:$ptr, GR32:$val),
+ "#ATOMMIN32 PSUEDO!",
+ [(set GR32:$dst, (atomic_load_min addr:$ptr, GR32:$val))]>,
+ TB, LOCK;
+}
+
+let Constraints = "$val = $dst", Defs = [EFLAGS],
+ usesCustomDAGSchedInserter = 1 in {
+def ATOMMAX32: I<0xC1, MRMSrcMem, (outs GR32:$dst),(ins i32mem:$ptr, GR32:$val),
+ "#ATOMMAX32 PSUEDO!",
+ [(set GR32:$dst, (atomic_load_max addr:$ptr, GR32:$val))]>,
+ TB, LOCK;
+}
+
+let Constraints = "$val = $dst", Defs = [EFLAGS],
+ usesCustomDAGSchedInserter = 1 in {
+def ATOMUMIN32: I<0xC1, MRMSrcMem,(outs GR32:$dst),(ins i32mem:$ptr, GR32:$val),
+ "#ATOMUMIN32 PSUEDO!",
+ [(set GR32:$dst, (atomic_load_umin addr:$ptr, GR32:$val))]>,
+ TB, LOCK;
+}
+
+let Constraints = "$val = $dst", Defs = [EFLAGS],
+ usesCustomDAGSchedInserter = 1 in {
+def ATOMUMAX32: I<0xC1, MRMSrcMem,(outs GR32:$dst),(ins i32mem:$ptr, GR32:$val),
+ "#ATOMUMAX32 PSUEDO!",
+ [(set GR32:$dst, (atomic_load_umax addr:$ptr, GR32:$val))]>,
+ TB, LOCK;
+}
+
//===----------------------------------------------------------------------===//
// Non-Instruction Patterns
//===----------------------------------------------------------------------===//