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author | Dale Johannesen <dalej@apple.com> | 2008-08-28 02:44:49 +0000 |
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committer | Dale Johannesen <dalej@apple.com> | 2008-08-28 02:44:49 +0000 |
commit | e00a8a2a2e11a37fd1ddf2504bd22d225d0994d0 (patch) | |
tree | 484cf9b89070b672dd21616a49c0f15109bd51b8 /lib/Target/X86/X86InstrInfo.td | |
parent | f2c785edf0d7ceb4491333146e289fdbbba1dddf (diff) | |
download | llvm-e00a8a2a2e11a37fd1ddf2504bd22d225d0994d0.tar.gz llvm-e00a8a2a2e11a37fd1ddf2504bd22d225d0994d0.tar.bz2 llvm-e00a8a2a2e11a37fd1ddf2504bd22d225d0994d0.tar.xz |
Split the ATOMIC NodeType's to include the size, e.g.
ATOMIC_LOAD_ADD_{8,16,32,64} instead of ATOMIC_LOAD_ADD.
Increased the Hardcoded Constant OpActionsCapacity to match.
Large but boring; no functional change.
This is to support partial-word atomics on ppc; i8 is
not a valid type there, so by the time we get to lowering, the
ATOMIC_LOAD nodes looks the same whether the type was i8 or i32.
The information can be added to the AtomicSDNode, but that is the
largest SDNode; I don't fully understand the SDNode allocation,
but it is sensitive to the largest node size, so increasing
that must be bad. This is the alternative.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55457 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/X86/X86InstrInfo.td')
-rw-r--r-- | lib/Target/X86/X86InstrInfo.td | 40 |
1 files changed, 20 insertions, 20 deletions
diff --git a/lib/Target/X86/X86InstrInfo.td b/lib/Target/X86/X86InstrInfo.td index e55edceff1..ee84fc19f1 100644 --- a/lib/Target/X86/X86InstrInfo.td +++ b/lib/Target/X86/X86InstrInfo.td @@ -2637,66 +2637,66 @@ let Constraints = "$val = $dst", Defs = [EFLAGS], usesCustomDAGSchedInserter = 1 in { def ATOMAND32 : I<0, Pseudo, (outs GR32:$dst),(ins i32mem:$ptr, GR32:$val), "#ATOMAND32 PSUEDO!", - [(set GR32:$dst, (atomic_load_and addr:$ptr, GR32:$val))]>; + [(set GR32:$dst, (atomic_load_and_32 addr:$ptr, GR32:$val))]>; def ATOMOR32 : I<0, Pseudo, (outs GR32:$dst),(ins i32mem:$ptr, GR32:$val), "#ATOMOR32 PSUEDO!", - [(set GR32:$dst, (atomic_load_or addr:$ptr, GR32:$val))]>; + [(set GR32:$dst, (atomic_load_or_32 addr:$ptr, GR32:$val))]>; def ATOMXOR32 : I<0, Pseudo,(outs GR32:$dst),(ins i32mem:$ptr, GR32:$val), "#ATOMXOR32 PSUEDO!", - [(set GR32:$dst, (atomic_load_xor addr:$ptr, GR32:$val))]>; + [(set GR32:$dst, (atomic_load_xor_32 addr:$ptr, GR32:$val))]>; def ATOMNAND32 : I<0, Pseudo,(outs GR32:$dst),(ins i32mem:$ptr, GR32:$val), "#ATOMNAND32 PSUEDO!", - [(set GR32:$dst, (atomic_load_nand addr:$ptr, GR32:$val))]>; + [(set GR32:$dst, (atomic_load_nand_32 addr:$ptr, GR32:$val))]>; def ATOMMIN32: I<0, Pseudo, (outs GR32:$dst), (ins i32mem:$ptr, GR32:$val), "#ATOMMIN32 PSUEDO!", - [(set GR32:$dst, (atomic_load_min addr:$ptr, GR32:$val))]>; + [(set GR32:$dst, (atomic_load_min_32 addr:$ptr, GR32:$val))]>; def ATOMMAX32: I<0, Pseudo, (outs GR32:$dst),(ins i32mem:$ptr, GR32:$val), "#ATOMMAX32 PSUEDO!", - [(set GR32:$dst, (atomic_load_max addr:$ptr, GR32:$val))]>; + [(set GR32:$dst, (atomic_load_max_32 addr:$ptr, GR32:$val))]>; def ATOMUMIN32: I<0, Pseudo, (outs GR32:$dst),(ins i32mem:$ptr, GR32:$val), "#ATOMUMIN32 PSUEDO!", - [(set GR32:$dst, (atomic_load_umin addr:$ptr, GR32:$val))]>; + [(set GR32:$dst, (atomic_load_umin_32 addr:$ptr, GR32:$val))]>; def ATOMUMAX32: I<0, Pseudo, (outs GR32:$dst),(ins i32mem:$ptr, GR32:$val), "#ATOMUMAX32 PSUEDO!", - [(set GR32:$dst, (atomic_load_umax addr:$ptr, GR32:$val))]>; + [(set GR32:$dst, (atomic_load_umax_32 addr:$ptr, GR32:$val))]>; def ATOMAND16 : I<0, Pseudo, (outs GR16:$dst),(ins i16mem:$ptr, GR16:$val), "#ATOMAND16 PSUEDO!", - [(set GR16:$dst, (atomic_load_and addr:$ptr, GR16:$val))]>; + [(set GR16:$dst, (atomic_load_and_16 addr:$ptr, GR16:$val))]>; def ATOMOR16 : I<0, Pseudo, (outs GR16:$dst),(ins i16mem:$ptr, GR16:$val), "#ATOMOR16 PSUEDO!", - [(set GR16:$dst, (atomic_load_or addr:$ptr, GR16:$val))]>; + [(set GR16:$dst, (atomic_load_or_16 addr:$ptr, GR16:$val))]>; def ATOMXOR16 : I<0, Pseudo,(outs GR16:$dst),(ins i16mem:$ptr, GR16:$val), "#ATOMXOR16 PSUEDO!", - [(set GR16:$dst, (atomic_load_xor addr:$ptr, GR16:$val))]>; + [(set GR16:$dst, (atomic_load_xor_16 addr:$ptr, GR16:$val))]>; def ATOMNAND16 : I<0, Pseudo,(outs GR16:$dst),(ins i16mem:$ptr, GR16:$val), "#ATOMNAND16 PSUEDO!", - [(set GR16:$dst, (atomic_load_nand addr:$ptr, GR16:$val))]>; + [(set GR16:$dst, (atomic_load_nand_16 addr:$ptr, GR16:$val))]>; def ATOMMIN16: I<0, Pseudo, (outs GR16:$dst), (ins i16mem:$ptr, GR16:$val), "#ATOMMIN16 PSUEDO!", - [(set GR16:$dst, (atomic_load_min addr:$ptr, GR16:$val))]>; + [(set GR16:$dst, (atomic_load_min_16 addr:$ptr, GR16:$val))]>; def ATOMMAX16: I<0, Pseudo, (outs GR16:$dst),(ins i16mem:$ptr, GR16:$val), "#ATOMMAX16 PSUEDO!", - [(set GR16:$dst, (atomic_load_max addr:$ptr, GR16:$val))]>; + [(set GR16:$dst, (atomic_load_max_16 addr:$ptr, GR16:$val))]>; def ATOMUMIN16: I<0, Pseudo, (outs GR16:$dst),(ins i16mem:$ptr, GR16:$val), "#ATOMUMIN16 PSUEDO!", - [(set GR16:$dst, (atomic_load_umin addr:$ptr, GR16:$val))]>; + [(set GR16:$dst, (atomic_load_umin_16 addr:$ptr, GR16:$val))]>; def ATOMUMAX16: I<0, Pseudo, (outs GR16:$dst),(ins i16mem:$ptr, GR16:$val), "#ATOMUMAX16 PSUEDO!", - [(set GR16:$dst, (atomic_load_umax addr:$ptr, GR16:$val))]>; + [(set GR16:$dst, (atomic_load_umax_16 addr:$ptr, GR16:$val))]>; def ATOMAND8 : I<0, Pseudo, (outs GR8:$dst),(ins i8mem:$ptr, GR8:$val), "#ATOMAND8 PSUEDO!", - [(set GR8:$dst, (atomic_load_and addr:$ptr, GR8:$val))]>; + [(set GR8:$dst, (atomic_load_and_8 addr:$ptr, GR8:$val))]>; def ATOMOR8 : I<0, Pseudo, (outs GR8:$dst),(ins i8mem:$ptr, GR8:$val), "#ATOMOR8 PSUEDO!", - [(set GR8:$dst, (atomic_load_or addr:$ptr, GR8:$val))]>; + [(set GR8:$dst, (atomic_load_or_8 addr:$ptr, GR8:$val))]>; def ATOMXOR8 : I<0, Pseudo,(outs GR8:$dst),(ins i8mem:$ptr, GR8:$val), "#ATOMXOR8 PSUEDO!", - [(set GR8:$dst, (atomic_load_xor addr:$ptr, GR8:$val))]>; + [(set GR8:$dst, (atomic_load_xor_8 addr:$ptr, GR8:$val))]>; def ATOMNAND8 : I<0, Pseudo,(outs GR8:$dst),(ins i8mem:$ptr, GR8:$val), "#ATOMNAND8 PSUEDO!", - [(set GR8:$dst, (atomic_load_nand addr:$ptr, GR8:$val))]>; + [(set GR8:$dst, (atomic_load_nand_8 addr:$ptr, GR8:$val))]>; } //===----------------------------------------------------------------------===// |