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| author | Daniel Dunbar <daniel@zuster.org> | 2009-08-11 22:17:52 +0000 |
|---|---|---|
| committer | Daniel Dunbar <daniel@zuster.org> | 2009-08-11 22:17:52 +0000 |
| commit | 7417b761c2d88335bd77d38911ff8d323fc4a4f2 (patch) | |
| tree | d64cf357fa8379447be1c46ed69fc7f509ae2316 /lib/Target/X86/X86InstrMMX.td | |
| parent | b6ba9c36dbc54c85b86b29d9491c457b4de8b60c (diff) | |
| download | llvm-7417b761c2d88335bd77d38911ff8d323fc4a4f2.tar.gz llvm-7417b761c2d88335bd77d38911ff8d323fc4a4f2.tar.bz2 llvm-7417b761c2d88335bd77d38911ff8d323fc4a4f2.tar.xz | |
Add 'isCodeGenOnly' bit to Instruction .td records.
- Used to mark fake instructions which don't correspond to an actual machine
instruction (or are duplicates of a real instruction). This is to be used for
"special cases" in the .td files, which should be ignored by things like the
assembler and disassembler. We still need a good solution to handle pervasive
duplication, like with the Int_ instructions.
- Set the bit on fake "mov 0" style instructions, which allows turning an
assembler matcher warning into a hard error.
- -2 FIXMEs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78731 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/X86/X86InstrMMX.td')
| -rw-r--r-- | lib/Target/X86/X86InstrMMX.td | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/lib/Target/X86/X86InstrMMX.td b/lib/Target/X86/X86InstrMMX.td index dfdf700e46..ce76b4e8b1 100644 --- a/lib/Target/X86/X86InstrMMX.td +++ b/lib/Target/X86/X86InstrMMX.td @@ -516,7 +516,7 @@ def MMX_MASKMOVQ64: MMXI64<0xF7, MRMSrcReg, (outs), (ins VR64:$src, VR64:$mask), //===----------------------------------------------------------------------===// // Alias instructions that map zero vector to pxor. -let isReMaterializable = 1 in { +let isReMaterializable = 1, isCodeGenOnly = 1 in { def MMX_V_SET0 : MMXI<0xEF, MRMInitReg, (outs VR64:$dst), (ins), "pxor\t$dst, $dst", [(set VR64:$dst, (v2i32 immAllZerosV))]>; |