diff options
| author | Evan Cheng <evan.cheng@apple.com> | 2008-03-19 23:38:52 +0000 |
|---|---|---|
| committer | Evan Cheng <evan.cheng@apple.com> | 2008-03-19 23:38:52 +0000 |
| commit | dff1dcac6cb0162fffa61b3d0d3281a55b74d9f9 (patch) | |
| tree | dff80f74261f3b8580002723fc3c65c61b18839f /lib/Target/X86/X86InstrMMX.td | |
| parent | ac3844d3f9ddc9a9fd8cfb508b10d4dae7bd8386 (diff) | |
| download | llvm-dff1dcac6cb0162fffa61b3d0d3281a55b74d9f9.tar.gz llvm-dff1dcac6cb0162fffa61b3d0d3281a55b74d9f9.tar.bz2 llvm-dff1dcac6cb0162fffa61b3d0d3281a55b74d9f9.tar.xz | |
Add intrinsics to match mmx shift builtin's with immediate operand.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48569 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/X86/X86InstrMMX.td')
| -rw-r--r-- | lib/Target/X86/X86InstrMMX.td | 22 |
1 files changed, 11 insertions, 11 deletions
diff --git a/lib/Target/X86/X86InstrMMX.td b/lib/Target/X86/X86InstrMMX.td index 3d8bd1f579..b079d17fd6 100644 --- a/lib/Target/X86/X86InstrMMX.td +++ b/lib/Target/X86/X86InstrMMX.td @@ -116,7 +116,8 @@ let isTwoAddress = 1 in { } multiclass MMXI_binop_rmi_int<bits<8> opc, bits<8> opc2, Format ImmForm, - string OpcodeStr, Intrinsic IntId> { + string OpcodeStr, Intrinsic IntId, + Intrinsic ImmIntId> { def rr : MMXI<opc, MRMSrcReg, (outs VR64:$dst), (ins VR64:$src1, VR64:$src2), !strconcat(OpcodeStr, "\t{$src2, $dst|$dst, $src2}"), [(set VR64:$dst, (IntId VR64:$src1, VR64:$src2))]>; @@ -126,8 +127,7 @@ let isTwoAddress = 1 in { (bitconvert (load_mmx addr:$src2))))]>; def ri : MMXIi8<opc2, ImmForm, (outs VR64:$dst), (ins VR64:$src1, i32i8imm:$src2), !strconcat(OpcodeStr, "\t{$src2, $dst|$dst, $src2}"), - [(set VR64:$dst, (IntId VR64:$src1, - (scalar_to_vector (i32 imm:$src2))))]>; + [(set VR64:$dst, (ImmIntId VR64:$src1, imm:$src2))]>; } } @@ -268,23 +268,23 @@ let isTwoAddress = 1 in { // Shift Instructions defm MMX_PSRLW : MMXI_binop_rmi_int<0xD1, 0x71, MRM2r, "psrlw", - int_x86_mmx_psrl_w>; + int_x86_mmx_psrl_w, int_x86_mmx_psrli_w>; defm MMX_PSRLD : MMXI_binop_rmi_int<0xD2, 0x72, MRM2r, "psrld", - int_x86_mmx_psrl_d>; + int_x86_mmx_psrl_d, int_x86_mmx_psrli_d>; defm MMX_PSRLQ : MMXI_binop_rmi_int<0xD3, 0x73, MRM2r, "psrlq", - int_x86_mmx_psrl_q>; + int_x86_mmx_psrl_q, int_x86_mmx_psrli_q>; defm MMX_PSLLW : MMXI_binop_rmi_int<0xF1, 0x71, MRM6r, "psllw", - int_x86_mmx_psll_w>; + int_x86_mmx_psll_w, int_x86_mmx_pslli_w>; defm MMX_PSLLD : MMXI_binop_rmi_int<0xF2, 0x72, MRM6r, "pslld", - int_x86_mmx_psll_d>; + int_x86_mmx_psll_d, int_x86_mmx_pslli_d>; defm MMX_PSLLQ : MMXI_binop_rmi_int<0xF3, 0x73, MRM6r, "psllq", - int_x86_mmx_psll_q>; + int_x86_mmx_psll_q, int_x86_mmx_pslli_q>; defm MMX_PSRAW : MMXI_binop_rmi_int<0xE1, 0x71, MRM4r, "psraw", - int_x86_mmx_psra_w>; + int_x86_mmx_psra_w, int_x86_mmx_psrai_w>; defm MMX_PSRAD : MMXI_binop_rmi_int<0xE2, 0x72, MRM4r, "psrad", - int_x86_mmx_psra_d>; + int_x86_mmx_psra_d, int_x86_mmx_psrai_d>; // Comparison Instructions defm MMX_PCMPEQB : MMXI_binop_rm_int<0x74, "pcmpeqb", int_x86_mmx_pcmpeq_b>; |