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| author | Cameron McInally <cameron.mcinally@nyu.edu> | 2013-11-19 14:36:00 +0000 |
|---|---|---|
| committer | Cameron McInally <cameron.mcinally@nyu.edu> | 2013-11-19 14:36:00 +0000 |
| commit | c5a925c198c33b441d0ec5203f48a0f17c8c09d1 (patch) | |
| tree | 36c551ed990d59b6ee1cad54c9ce7f5b10645cbc /lib/Target/X86/X86InstrSSE.td | |
| parent | c5e99819f46d53c77f4ff9c2d69fdcca4ad46ea3 (diff) | |
| download | llvm-c5a925c198c33b441d0ec5203f48a0f17c8c09d1.tar.gz llvm-c5a925c198c33b441d0ec5203f48a0f17c8c09d1.tar.bz2 llvm-c5a925c198c33b441d0ec5203f48a0f17c8c09d1.tar.xz | |
Fix assembly operands for the SSE2 cvtsd2ss instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195129 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/X86/X86InstrSSE.td')
| -rw-r--r-- | lib/Target/X86/X86InstrSSE.td | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/lib/Target/X86/X86InstrSSE.td b/lib/Target/X86/X86InstrSSE.td index 3395b6231e..a5debc0256 100644 --- a/lib/Target/X86/X86InstrSSE.td +++ b/lib/Target/X86/X86InstrSSE.td @@ -1810,14 +1810,14 @@ def Int_VCVTSD2SSrm: I<0x5A, MRMSrcReg, let Constraints = "$src1 = $dst" in { def Int_CVTSD2SSrr: I<0x5A, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src1, VR128:$src2), - "cvtsd2ss\t{$src2, $src1, $dst|$dst, $src1, $src2}", + "cvtsd2ss\t{$src2, $dst|$dst, $src2}", [(set VR128:$dst, (int_x86_sse2_cvtsd2ss VR128:$src1, VR128:$src2))], IIC_SSE_CVT_Scalar_RR>, XD, Requires<[UseSSE2]>, Sched<[WriteCvtF2F]>; def Int_CVTSD2SSrm: I<0x5A, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src1, sdmem:$src2), - "cvtsd2ss\t{$src2, $src1, $dst|$dst, $src1, $src2}", + "cvtsd2ss\t{$src2, $dst|$dst, $src2}", [(set VR128:$dst, (int_x86_sse2_cvtsd2ss VR128:$src1, sse_load_f64:$src2))], IIC_SSE_CVT_Scalar_RM>, XD, Requires<[UseSSE2]>, |