diff options
| author | Chris Lattner <sabre@nondot.org> | 2010-10-08 01:05:10 +0000 |
|---|---|---|
| committer | Chris Lattner <sabre@nondot.org> | 2010-10-08 01:05:10 +0000 |
| commit | cd3167b281f08e47a81438718122b6dd75a6316e (patch) | |
| tree | 1312fbde7f2a4c47d05bf5d70e48e04dfa5ac10d /lib/Target/X86/X86MCInstLower.cpp | |
| parent | 0f448b5bf682c16c23c7ec239eb74f08d333e8c1 (diff) | |
| download | llvm-cd3167b281f08e47a81438718122b6dd75a6316e.tar.gz llvm-cd3167b281f08e47a81438718122b6dd75a6316e.tar.bz2 llvm-cd3167b281f08e47a81438718122b6dd75a6316e.tar.xz | |
reimplement the second half of the or/add optimization. We should now
only end up emitting LEA instead of OR. If we aren't able to promote
something into an LEA, we should never be emitting it as an ADD.
Add some testcases that we emit "or" in cases where we used to produce
an "add".
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116026 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/X86/X86MCInstLower.cpp')
| -rw-r--r-- | lib/Target/X86/X86MCInstLower.cpp | 12 |
1 files changed, 9 insertions, 3 deletions
diff --git a/lib/Target/X86/X86MCInstLower.cpp b/lib/Target/X86/X86MCInstLower.cpp index 662717bae7..8f90d87282 100644 --- a/lib/Target/X86/X86MCInstLower.cpp +++ b/lib/Target/X86/X86MCInstLower.cpp @@ -437,9 +437,15 @@ ReSimplify: // These are pseudo-ops for OR to help with the OR->ADD transformation. We do // this with an ugly goto in case the resultant OR uses EAX and needs the // short form. - case X86::ADD16rr_DB: OutMI.setOpcode(X86::OR16rr); goto ReSimplify; - case X86::ADD32rr_DB: OutMI.setOpcode(X86::OR32rr); goto ReSimplify; - case X86::ADD64rr_DB: OutMI.setOpcode(X86::OR64rr); goto ReSimplify; + case X86::ADD16rr_DB: OutMI.setOpcode(X86::OR16rr); goto ReSimplify; + case X86::ADD32rr_DB: OutMI.setOpcode(X86::OR32rr); goto ReSimplify; + case X86::ADD64rr_DB: OutMI.setOpcode(X86::OR64rr); goto ReSimplify; + case X86::ADD16ri_DB: OutMI.setOpcode(X86::OR16ri); goto ReSimplify; + case X86::ADD32ri_DB: OutMI.setOpcode(X86::OR32ri); goto ReSimplify; + case X86::ADD64ri32_DB: OutMI.setOpcode(X86::OR64ri32); goto ReSimplify; + case X86::ADD16ri8_DB: OutMI.setOpcode(X86::OR16ri8); goto ReSimplify; + case X86::ADD32ri8_DB: OutMI.setOpcode(X86::OR32ri8); goto ReSimplify; + case X86::ADD64ri8_DB: OutMI.setOpcode(X86::OR64ri8); goto ReSimplify; // The assembler backend wants to see branches in their small form and relax // them to their large form. The JIT can only handle the large form because |