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author | Evan Cheng <evan.cheng@apple.com> | 2007-10-18 21:29:24 +0000 |
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committer | Evan Cheng <evan.cheng@apple.com> | 2007-10-18 21:29:24 +0000 |
commit | 58184e6878fdab651bc7c9a59dab2687ca82ede2 (patch) | |
tree | 31c7f282b0d132b9b8b6153cf5ed87f3c5221ef5 /lib/Target/X86/X86RegisterInfo.h | |
parent | 99db6add3d3185c06acb1785d6d685f3e680aa0d (diff) | |
download | llvm-58184e6878fdab651bc7c9a59dab2687ca82ede2.tar.gz llvm-58184e6878fdab651bc7c9a59dab2687ca82ede2.tar.bz2 llvm-58184e6878fdab651bc7c9a59dab2687ca82ede2.tar.xz |
Use SmallVectorImpl instead of SmallVector with hardcoded size in MRegister public interface.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43150 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/X86/X86RegisterInfo.h')
-rw-r--r-- | lib/Target/X86/X86RegisterInfo.h | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/lib/Target/X86/X86RegisterInfo.h b/lib/Target/X86/X86RegisterInfo.h index 26b52f4530..76045476c2 100644 --- a/lib/Target/X86/X86RegisterInfo.h +++ b/lib/Target/X86/X86RegisterInfo.h @@ -89,9 +89,9 @@ public: const TargetRegisterClass *RC) const; void storeRegToAddr(MachineFunction &MF, unsigned SrcReg, - SmallVector<MachineOperand,4> Addr, + SmallVectorImpl<MachineOperand> Addr, const TargetRegisterClass *RC, - SmallVector<MachineInstr*,4> &NewMIs) const; + SmallVectorImpl<MachineInstr*> &NewMIs) const; void loadRegFromStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, @@ -99,9 +99,9 @@ public: const TargetRegisterClass *RC) const; void loadRegFromAddr(MachineFunction &MF, unsigned DestReg, - SmallVector<MachineOperand,4> Addr, + SmallVectorImpl<MachineOperand> Addr, const TargetRegisterClass *RC, - SmallVector<MachineInstr*,4> &NewMIs) const; + SmallVectorImpl<MachineInstr*> &NewMIs) const; void copyRegToReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, @@ -137,10 +137,10 @@ public: /// possible, returns true as well as the new instructions by reference. bool unfoldMemoryOperand(MachineFunction &MF, MachineInstr *MI, unsigned Reg, bool UnfoldLoad, bool UnfoldStore, - SmallVector<MachineInstr*, 4> &NewMIs) const; + SmallVectorImpl<MachineInstr*> &NewMIs) const; bool unfoldMemoryOperand(SelectionDAG &DAG, SDNode *N, - SmallVector<SDNode*, 4> &NewNodes) const; + SmallVectorImpl<SDNode*> &NewNodes) const; /// getCalleeSavedRegs - Return a null-terminated list of all of the /// callee-save registers on this target. |