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| author | Andrew Trick <atrick@apple.com> | 2013-06-21 18:33:04 +0000 |
|---|---|---|
| committer | Andrew Trick <atrick@apple.com> | 2013-06-21 18:33:04 +0000 |
| commit | 9b5575d55add0bb2c8769f76db250ff0f4efe8dc (patch) | |
| tree | eb903d99319eab226ae34d2d985d8adcd10a11c0 /lib/Target/X86/X86SchedSandyBridge.td | |
| parent | 3bf23304ee80946409626cf64282a76c13a44352 (diff) | |
| download | llvm-9b5575d55add0bb2c8769f76db250ff0f4efe8dc.tar.gz llvm-9b5575d55add0bb2c8769f76db250ff0f4efe8dc.tar.bz2 llvm-9b5575d55add0bb2c8769f76db250ff0f4efe8dc.tar.xz | |
Fix IMULX machine model. Multiple def operands require multiple SchedWrites.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184566 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/X86/X86SchedSandyBridge.td')
| -rw-r--r-- | lib/Target/X86/X86SchedSandyBridge.td | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/lib/Target/X86/X86SchedSandyBridge.td b/lib/Target/X86/X86SchedSandyBridge.td index e03de149a6..52ead94714 100644 --- a/lib/Target/X86/X86SchedSandyBridge.td +++ b/lib/Target/X86/X86SchedSandyBridge.td @@ -86,6 +86,7 @@ def : WriteRes<WriteZero, []>; defm : SBWriteResPair<WriteALU, SBPort015, 1>; defm : SBWriteResPair<WriteIMul, SBPort1, 3>; +def : WriteRes<WriteIMulH, []> { let Latency = 3; } defm : SBWriteResPair<WriteShift, SBPort05, 1>; defm : SBWriteResPair<WriteJump, SBPort5, 1>; |