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| author | Andrew Trick <atrick@apple.com> | 2013-06-15 04:50:02 +0000 |
|---|---|---|
| committer | Andrew Trick <atrick@apple.com> | 2013-06-15 04:50:02 +0000 |
| commit | a5ce5f36d3a1e312304e8312ca64a1342f5f55a6 (patch) | |
| tree | 48b5f93d3c1ec9781977edafc9a09eb43673b8a9 /lib/Target/X86/X86ScheduleAtom.td | |
| parent | b86a0cdb674549d8493043331cecd9cbf53b80da (diff) | |
| download | llvm-a5ce5f36d3a1e312304e8312ca64a1342f5f55a6.tar.gz llvm-a5ce5f36d3a1e312304e8312ca64a1342f5f55a6.tar.bz2 llvm-a5ce5f36d3a1e312304e8312ca64a1342f5f55a6.tar.xz | |
Update machine models. Specify buffer sizes for OOO processors.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184033 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/X86/X86ScheduleAtom.td')
| -rw-r--r-- | lib/Target/X86/X86ScheduleAtom.td | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/lib/Target/X86/X86ScheduleAtom.td b/lib/Target/X86/X86ScheduleAtom.td index 494a690248..14a1471d02 100644 --- a/lib/Target/X86/X86ScheduleAtom.td +++ b/lib/Target/X86/X86ScheduleAtom.td @@ -525,8 +525,7 @@ def AtomItineraries : ProcessorItineraries< // Atom machine model. def AtomModel : SchedMachineModel { let IssueWidth = 2; // Allows 2 instructions per scheduling group. - let MinLatency = 1; // InstrStage cycles overrides MinLatency. - // OperandCycles may be used for expected latency. + let MicroOpBufferSize = 0; // In-order execution, always hide latency. let LoadLatency = 3; // Expected cycles, may be overriden by OperandCycles. let HighLatency = 30;// Expected, may be overriden by OperandCycles. |