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| author | Preston Gurd <preston.gurd@intel.com> | 2013-09-13 19:23:28 +0000 |
|---|---|---|
| committer | Preston Gurd <preston.gurd@intel.com> | 2013-09-13 19:23:28 +0000 |
| commit | 94dc6540a8f3aaadb43dda50e49fc79141fae8ed (patch) | |
| tree | 909ea42f4259ad0a03ffd2add982988f3c0185be /lib/Target/X86/X86Subtarget.cpp | |
| parent | 0df68423f9567b3d3eafb3b26668f783b07f687f (diff) | |
| download | llvm-94dc6540a8f3aaadb43dda50e49fc79141fae8ed.tar.gz llvm-94dc6540a8f3aaadb43dda50e49fc79141fae8ed.tar.bz2 llvm-94dc6540a8f3aaadb43dda50e49fc79141fae8ed.tar.xz | |
Adds support for Atom Silvermont (SLM) - -march=slm
Implements Instruction scheduler latencies for Silvermont,
using latencies from the Intel Silvermont Optimization Guide.
Auto detects SLM.
Turns on post RA scheduler when generating code for SLM.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190717 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/X86/X86Subtarget.cpp')
| -rw-r--r-- | lib/Target/X86/X86Subtarget.cpp | 8 |
1 files changed, 6 insertions, 2 deletions
diff --git a/lib/Target/X86/X86Subtarget.cpp b/lib/Target/X86/X86Subtarget.cpp index 851ab63ee6..78c9a1a6a3 100644 --- a/lib/Target/X86/X86Subtarget.cpp +++ b/lib/Target/X86/X86Subtarget.cpp @@ -281,7 +281,7 @@ void X86Subtarget::AutoDetectSubtargetFeatures() { ToggleFeature(X86::FeatureFastUAMem); } - // Set processor type. Currently only Atom is detected. + // Set processor type. Currently only Atom or Silvermont (SLM) is detected. if (Family == 6 && (Model == 28 || Model == 38 || Model == 39 || Model == 53 || Model == 54)) { @@ -290,6 +290,10 @@ void X86Subtarget::AutoDetectSubtargetFeatures() { UseLeaForSP = true; ToggleFeature(X86::FeatureLeaForSP); } + else if (Family == 6 && + (Model == 55 || Model == 74 || Model == 77)) { + X86ProcFamily = IntelSLM; + } unsigned MaxExtLevel; X86_MC::GetCpuIDAndInfo(0x80000000, &MaxExtLevel, &EBX, &ECX, &EDX); @@ -451,7 +455,7 @@ void X86Subtarget::resetSubtargetFeatures(StringRef CPU, StringRef FS) { // new MCSchedModel is used. InitMCProcessorInfo(CPUName, FS); - if (X86ProcFamily == IntelAtom) + if (X86ProcFamily == IntelAtom || X86ProcFamily == IntelSLM) PostRAScheduler = true; InstrItins = getInstrItineraryForCPU(CPUName); |