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authorRafael Espindola <rafael.espindola@gmail.com>2014-01-01 22:29:43 +0000
committerRafael Espindola <rafael.espindola@gmail.com>2014-01-01 22:29:43 +0000
commit33cc3f81c1f5475b62332262bec3b816b9d8202e (patch)
treefbcbeeae92476402da56518a3e1fb24dc07507b6 /lib/Target/X86/X86TargetMachine.cpp
parent447c3480e54a94274a5cc37eee06f8cada43237e (diff)
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Remove the 's' DataLayout specification
During the years there have been some attempts at figuring out how to align byval arguments. A look at the commit log suggests that they were * Use the ABI alignment. * When that was not sufficient for x86-64, I added the 's' specification to DataLayout. * When that was not sufficient Evan added the virtual getByValTypeAlignment. * When even that was not sufficient, we just got the FE to add the alignment to the byval. This patch is just a simple cleanup that removes my first attempt at fixing the problem. I also added an AArch64 implementation of getByValTypeAlignment to make sure this patch is a nop. I also left the 's' parsing for backward compatibility. I will send a short email to llvmdev about the change for anyone maintaining an out of tree target. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198287 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/X86/X86TargetMachine.cpp')
-rw-r--r--lib/Target/X86/X86TargetMachine.cpp4
1 files changed, 0 insertions, 4 deletions
diff --git a/lib/Target/X86/X86TargetMachine.cpp b/lib/Target/X86/X86TargetMachine.cpp
index 04c1d7ebb9..773d702a6b 100644
--- a/lib/Target/X86/X86TargetMachine.cpp
+++ b/lib/Target/X86/X86TargetMachine.cpp
@@ -53,10 +53,6 @@ static std::string computeDataLayout(const X86Subtarget &ST) {
else
Ret += "-f80:32";
- // Objects on the stack ore aligned to 64 bits.
- if (ST.is64Bit())
- Ret += "-s:64";
-
// The registers can hold 8, 16, 32 or, in x86-64, 64 bits.
if (ST.is64Bit())
Ret += "-n8:16:32:64";