diff options
| author | David Woodhouse <dwmw2@infradead.org> | 2014-01-22 15:08:49 +0000 |
|---|---|---|
| committer | David Woodhouse <dwmw2@infradead.org> | 2014-01-22 15:08:49 +0000 |
| commit | af588b9f0eb5b113e459918737a855be8782e112 (patch) | |
| tree | fc79dc80389ba2bf1b08299346cb88649368db0b /lib/Target/X86 | |
| parent | 51cd16cbd592d1b8da3888d6a4f9c684ed50a02a (diff) | |
| download | llvm-af588b9f0eb5b113e459918737a855be8782e112.tar.gz llvm-af588b9f0eb5b113e459918737a855be8782e112.tar.bz2 llvm-af588b9f0eb5b113e459918737a855be8782e112.tar.xz | |
[x86] Allow segment and address-size overrides for OUTS[BWLQ] (PR9385)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199808 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/X86')
| -rw-r--r-- | lib/Target/X86/AsmParser/X86AsmParser.cpp | 20 | ||||
| -rw-r--r-- | lib/Target/X86/X86InstrInfo.td | 9 |
2 files changed, 16 insertions, 13 deletions
diff --git a/lib/Target/X86/AsmParser/X86AsmParser.cpp b/lib/Target/X86/AsmParser/X86AsmParser.cpp index d6b2ad418e..a23f5a298a 100644 --- a/lib/Target/X86/AsmParser/X86AsmParser.cpp +++ b/lib/Target/X86/AsmParser/X86AsmParser.cpp @@ -2345,16 +2345,16 @@ ParseInstruction(ParseInstructionInfo &Info, StringRef Name, SMLoc NameLoc, } } - // Transform "outs[bwl] %ds:(%esi), %dx" into "out[bwl]" - if (Name.startswith("outs") && Operands.size() == 3 && - (Name == "outsb" || Name == "outsw" || Name == "outsl")) { - X86Operand &Op = *(X86Operand*)Operands.begin()[1]; - X86Operand &Op2 = *(X86Operand*)Operands.begin()[2]; - if (isSrcOp(Op) && Op2.isReg() && Op2.getReg() == X86::DX) { - Operands.pop_back(); - Operands.pop_back(); - delete &Op; - delete &Op2; + // Append default arguments to "outs[bwld]" + if (Name.startswith("outs") && Operands.size() == 1 && + (Name == "outsb" || Name == "outsw" || Name == "outsl" || + Name == "outsd" )) { + if (isParsingIntelSyntax()) { + Operands.push_back(DefaultMemSIOperand(NameLoc)); + Operands.push_back(X86Operand::CreateReg(X86::DX, NameLoc, NameLoc)); + } else { + Operands.push_back(DefaultMemSIOperand(NameLoc)); + Operands.push_back(X86Operand::CreateReg(X86::DX, NameLoc, NameLoc)); } } diff --git a/lib/Target/X86/X86InstrInfo.td b/lib/Target/X86/X86InstrInfo.td index 13c310290a..2885bb54fc 100644 --- a/lib/Target/X86/X86InstrInfo.td +++ b/lib/Target/X86/X86InstrInfo.td @@ -1772,9 +1772,12 @@ def LODSQ : RI<0xAD, RawFrmSrc, (outs), (ins srcidx64:$src), } let SchedRW = [WriteSystem] in { -def OUTSB : I<0x6E, RawFrm, (outs), (ins), "outsb", [], IIC_OUTS>; -def OUTSW : I<0x6F, RawFrm, (outs), (ins), "outsw", [], IIC_OUTS>, OpSize; -def OUTSL : I<0x6F, RawFrm, (outs), (ins), "outs{l|d}", [], IIC_OUTS>, OpSize16; +def OUTSB : I<0x6E, RawFrmSrc, (outs), (ins srcidx8:$src), + "outsb\t{$src, %dx|dx, $src}", [], IIC_OUTS>; +def OUTSW : I<0x6F, RawFrmSrc, (outs), (ins srcidx16:$src), + "outsw\t{$src, %dx|dx, $src}", [], IIC_OUTS>, OpSize; +def OUTSL : I<0x6F, RawFrmSrc, (outs), (ins srcidx32:$src), + "outs{l|d}\t{$src, %dx|dx, $src}", [], IIC_OUTS>, OpSize16; } // Flag instructions |