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author | Craig Topper <craig.topper@gmail.com> | 2014-04-04 05:16:06 +0000 |
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committer | Craig Topper <craig.topper@gmail.com> | 2014-04-04 05:16:06 +0000 |
commit | 84f7f350c3f8e33c2143ff44aa0a3fbbfd82657f (patch) | |
tree | 2558b3962c0fe30a89608ee7b2544277b62fb75f /lib/Target/XCore | |
parent | 84c21b38a95235a4a2c71e0557c06d889fad6b4e (diff) | |
download | llvm-84f7f350c3f8e33c2143ff44aa0a3fbbfd82657f.tar.gz llvm-84f7f350c3f8e33c2143ff44aa0a3fbbfd82657f.tar.bz2 llvm-84f7f350c3f8e33c2143ff44aa0a3fbbfd82657f.tar.xz |
Make consistent use of MCPhysReg instead of uint16_t throughout the tree.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205610 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/XCore')
-rw-r--r-- | lib/Target/XCore/XCoreISelLowering.cpp | 2 | ||||
-rw-r--r-- | lib/Target/XCore/XCoreRegisterInfo.cpp | 6 | ||||
-rw-r--r-- | lib/Target/XCore/XCoreRegisterInfo.h | 2 |
3 files changed, 5 insertions, 5 deletions
diff --git a/lib/Target/XCore/XCoreISelLowering.cpp b/lib/Target/XCore/XCoreISelLowering.cpp index 1b74013ac1..83f8109c04 100644 --- a/lib/Target/XCore/XCoreISelLowering.cpp +++ b/lib/Target/XCore/XCoreISelLowering.cpp @@ -1384,7 +1384,7 @@ XCoreTargetLowering::LowerCCCArguments(SDValue Chain, // 1b. CopyFromReg vararg registers. if (isVarArg) { // Argument registers - static const uint16_t ArgRegs[] = { + static const MCPhysReg ArgRegs[] = { XCore::R0, XCore::R1, XCore::R2, XCore::R3 }; XCoreFunctionInfo *XFI = MF.getInfo<XCoreFunctionInfo>(); diff --git a/lib/Target/XCore/XCoreRegisterInfo.cpp b/lib/Target/XCore/XCoreRegisterInfo.cpp index d85d717651..8304059c64 100644 --- a/lib/Target/XCore/XCoreRegisterInfo.cpp +++ b/lib/Target/XCore/XCoreRegisterInfo.cpp @@ -205,16 +205,16 @@ bool XCoreRegisterInfo::needsFrameMoves(const MachineFunction &MF) { MF.getFunction()->needsUnwindTableEntry(); } -const uint16_t* XCoreRegisterInfo::getCalleeSavedRegs(const MachineFunction *MF) +const MCPhysReg* XCoreRegisterInfo::getCalleeSavedRegs(const MachineFunction *MF) const { // The callee saved registers LR & FP are explicitly handled during // emitPrologue & emitEpilogue and related functions. - static const uint16_t CalleeSavedRegs[] = { + static const MCPhysReg CalleeSavedRegs[] = { XCore::R4, XCore::R5, XCore::R6, XCore::R7, XCore::R8, XCore::R9, XCore::R10, 0 }; - static const uint16_t CalleeSavedRegsFP[] = { + static const MCPhysReg CalleeSavedRegsFP[] = { XCore::R4, XCore::R5, XCore::R6, XCore::R7, XCore::R8, XCore::R9, 0 diff --git a/lib/Target/XCore/XCoreRegisterInfo.h b/lib/Target/XCore/XCoreRegisterInfo.h index 36ba7b46e5..552cb78cbf 100644 --- a/lib/Target/XCore/XCoreRegisterInfo.h +++ b/lib/Target/XCore/XCoreRegisterInfo.h @@ -29,7 +29,7 @@ public: /// Code Generation virtual methods... - const uint16_t *getCalleeSavedRegs(const MachineFunction *MF = 0) const; + const MCPhysReg *getCalleeSavedRegs(const MachineFunction *MF = 0) const; BitVector getReservedRegs(const MachineFunction &MF) const; |