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| author | Richard Osborne <richard@xmos.com> | 2013-01-27 21:26:02 +0000 |
|---|---|---|
| committer | Richard Osborne <richard@xmos.com> | 2013-01-27 21:26:02 +0000 |
| commit | b719d8b1007f6b31ae6d1a66258a26e6a91749bc (patch) | |
| tree | 2776cde6e601adad4cfa3cf2b0ff3285a05d98cf /lib/Target/XCore | |
| parent | ec2589863b32da169240c4fa120ef1e3798615d4 (diff) | |
| download | llvm-b719d8b1007f6b31ae6d1a66258a26e6a91749bc.tar.gz llvm-b719d8b1007f6b31ae6d1a66258a26e6a91749bc.tar.bz2 llvm-b719d8b1007f6b31ae6d1a66258a26e6a91749bc.tar.xz | |
[XCore] Add missing l2r instructions.
These instructions are not targeted by the compiler but they are
needed for the MC layer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@173629 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/XCore')
| -rw-r--r-- | lib/Target/XCore/XCoreInstrInfo.td | 13 |
1 files changed, 12 insertions, 1 deletions
diff --git a/lib/Target/XCore/XCoreInstrInfo.td b/lib/Target/XCore/XCoreInstrInfo.td index 185083a1e8..613f9cb278 100644 --- a/lib/Target/XCore/XCoreInstrInfo.td +++ b/lib/Target/XCore/XCoreInstrInfo.td @@ -811,7 +811,6 @@ def ENDIN_2r : _F2R<0b100101, (outs GRRegs:$dst), (ins GRRegs:$src), [(set GRRegs:$dst, (int_xcore_endin GRRegs:$src))]>; // Two operand long -// getd, testlcl def BITREV_l2r : _FL2R<0b0000011000, (outs GRRegs:$dst), (ins GRRegs:$src), "bitrev $dst, $src", [(set GRRegs:$dst, (int_xcore_bitrev GRRegs:$src))]>; @@ -824,6 +823,12 @@ def CLZ_l2r : _FL2R<0b000111000, (outs GRRegs:$dst), (ins GRRegs:$src), "clz $dst, $src", [(set GRRegs:$dst, (ctlz GRRegs:$src))]>; +def GETD_l2r : _FL2R<0b0001111001, (outs GRRegs:$dst), (ins GRRegs:$src), + "getd $dst, res[$src]", []>; + +def GETN_l2r : _FL2R<0b0011011001, (outs GRRegs:$dst), (ins GRRegs:$src), + "getn $dst, res[$src]", []>; + def SETC_l2r : _FL2R<0b0010111001, (outs), (ins GRRegs:$r, GRRegs:$val), "setc res[$r], $val", [(int_xcore_setc GRRegs:$r, GRRegs:$val)]>; @@ -848,10 +853,16 @@ def SETCLK_l2r : _FLR2R<0b0000111001, (outs), (ins GRRegs:$src1, GRRegs:$src2), "setclk res[$src1], $src2", [(int_xcore_setclk GRRegs:$src1, GRRegs:$src2)]>; +def SETN_l2r : _FLR2R<0b0011011000, (outs), (ins GRRegs:$src1, GRRegs:$src2), + "setn res[$src1], $src2", []>; + def SETRDY_l2r : _FLR2R<0b0010111000, (outs), (ins GRRegs:$src1, GRRegs:$src2), "setrdy res[$src1], $src2", [(int_xcore_setrdy GRRegs:$src1, GRRegs:$src2)]>; +def TESTLCL_l2r : _FL2R<0b0010011000, (outs GRRegs:$dst), (ins GRRegs:$src), + "testlcl $dst, res[$src]", []>; + // One operand short def MSYNC_1r : _F1R<0b000111, (outs), (ins GRRegs:$a), "msync res[$a]", |