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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2014-04-17 02:03:08 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2014-04-17 02:03:08 +0000 |
| commit | 003de065a3648287fc72be1d6f87abc3a00f2c59 (patch) | |
| tree | d7fda6fdb0e51bcd3f92006aeab9848638895fa8 /lib/Target | |
| parent | e1a38f70414e10c7ac239dcc5b72fcdf6df1ccdb (diff) | |
| download | llvm-003de065a3648287fc72be1d6f87abc3a00f2c59.tar.gz llvm-003de065a3648287fc72be1d6f87abc3a00f2c59.tar.bz2 llvm-003de065a3648287fc72be1d6f87abc3a00f2c59.tar.xz | |
R600/SI: Fix zext from i1 to i64
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206437 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target')
| -rw-r--r-- | lib/Target/R600/SIISelLowering.cpp | 8 |
1 files changed, 6 insertions, 2 deletions
diff --git a/lib/Target/R600/SIISelLowering.cpp b/lib/Target/R600/SIISelLowering.cpp index 175709cad6..235665ab89 100644 --- a/lib/Target/R600/SIISelLowering.cpp +++ b/lib/Target/R600/SIISelLowering.cpp @@ -972,8 +972,12 @@ SDValue SITargetLowering::LowerZERO_EXTEND(SDValue Op, return SDValue(); } - return DAG.getNode(ISD::BUILD_PAIR, DL, VT, Op.getOperand(0), - DAG.getConstant(0, MVT::i32)); + SDValue Src = Op.getOperand(0); + if (Src.getValueType() != MVT::i32) + Src = DAG.getNode(ISD::ZERO_EXTEND, DL, MVT::i32, Src); + + SDValue Zero = DAG.getConstant(0, MVT::i32); + return DAG.getNode(ISD::BUILD_PAIR, DL, VT, Src, Zero); } //===----------------------------------------------------------------------===// |