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| author | Hal Finkel <hfinkel@anl.gov> | 2013-03-14 19:34:32 +0000 |
|---|---|---|
| committer | Hal Finkel <hfinkel@anl.gov> | 2013-03-14 19:34:32 +0000 |
| commit | 100a94bc93dcf9af99eba169599ce950faf0df7e (patch) | |
| tree | 668744b339b3d30c64b59998819ac514c3202c2b /lib/Target | |
| parent | d81511f0a671a9271d7ba10cce6c27331b57f553 (diff) | |
| download | llvm-100a94bc93dcf9af99eba169599ce950faf0df7e.tar.gz llvm-100a94bc93dcf9af99eba169599ce950faf0df7e.tar.bz2 llvm-100a94bc93dcf9af99eba169599ce950faf0df7e.tar.xz | |
Not all PPC functions with a frame pointer need a RS spill slot
We used to add a spill slot for the register scavenger whenever the function
has a frame pointer. This is unnecessarily conservative: We may need the spill
slot for dynamic stack allocations, and functions with dynamic stack
allocations always have a FP, but we might also have a FP for other reasons
(such as the user explicitly disabling frame-pointer elimination), and we don't
necessarily need a spill slot for those functions.
The structsinregs test needed adjustment because it disables FP elimination.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@177106 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target')
| -rw-r--r-- | lib/Target/PowerPC/PPCFrameLowering.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/lib/Target/PowerPC/PPCFrameLowering.cpp b/lib/Target/PowerPC/PPCFrameLowering.cpp index 0a396e6693..a93c944344 100644 --- a/lib/Target/PowerPC/PPCFrameLowering.cpp +++ b/lib/Target/PowerPC/PPCFrameLowering.cpp @@ -831,7 +831,7 @@ PPCFrameLowering::processFunctionBeforeCalleeSavedScan(MachineFunction &MF, // r0 for now. if (RegInfo->requiresRegisterScavenging(MF)) - if (needsFP(MF) || spillsCR(MF)) { + if (MFI->hasVarSizedObjects() || spillsCR(MF)) { const TargetRegisterClass *GPRC = &PPC::GPRCRegClass; const TargetRegisterClass *G8RC = &PPC::G8RCRegClass; const TargetRegisterClass *RC = isPPC64 ? G8RC : GPRC; |