diff options
| author | David Woodhouse <dwmw2@infradead.org> | 2014-01-08 12:57:55 +0000 |
|---|---|---|
| committer | David Woodhouse <dwmw2@infradead.org> | 2014-01-08 12:57:55 +0000 |
| commit | 1c75f15a60f83ad520cea34143aa21507ea46336 (patch) | |
| tree | da7298f50d8f89a2a71a26b577e811f45e5aaebf /lib/Target | |
| parent | ce8d7befbf01bcd6160398088799124b84be62e7 (diff) | |
| download | llvm-1c75f15a60f83ad520cea34143aa21507ea46336.tar.gz llvm-1c75f15a60f83ad520cea34143aa21507ea46336.tar.bz2 llvm-1c75f15a60f83ad520cea34143aa21507ea46336.tar.xz | |
[x86] Disambiguate [LS][IG]DT{32,64}m and add 16-bit versions, fix aliases
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198755 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target')
| -rw-r--r-- | lib/Target/X86/X86InstrInfo.td | 20 | ||||
| -rw-r--r-- | lib/Target/X86/X86InstrSystem.td | 24 |
2 files changed, 28 insertions, 16 deletions
diff --git a/lib/Target/X86/X86InstrInfo.td b/lib/Target/X86/X86InstrInfo.td index 5d69feffd1..b040ee26c8 100644 --- a/lib/Target/X86/X86InstrInfo.td +++ b/lib/Target/X86/X86InstrInfo.td @@ -2204,14 +2204,18 @@ def : MnemonicAlias<"iret", "iretl", "att">; def : MnemonicAlias<"sysret", "sysretl", "att">; def : MnemonicAlias<"sysexit", "sysexitl", "att">; -def : MnemonicAlias<"lgdtl", "lgdt", "att">, Requires<[Not64BitMode]>; -def : MnemonicAlias<"lgdtq", "lgdt", "att">, Requires<[In64BitMode]>; -def : MnemonicAlias<"lidtl", "lidt", "att">, Requires<[Not64BitMode]>; -def : MnemonicAlias<"lidtq", "lidt", "att">, Requires<[In64BitMode]>; -def : MnemonicAlias<"sgdtl", "sgdt", "att">, Requires<[Not64BitMode]>; -def : MnemonicAlias<"sgdtq", "sgdt", "att">, Requires<[In64BitMode]>; -def : MnemonicAlias<"sidtl", "sidt", "att">, Requires<[Not64BitMode]>; -def : MnemonicAlias<"sidtq", "sidt", "att">, Requires<[In64BitMode]>; +def : MnemonicAlias<"lgdt", "lgdtw", "att">, Requires<[In16BitMode]>; +def : MnemonicAlias<"lgdt", "lgdtl", "att">, Requires<[In32BitMode]>; +def : MnemonicAlias<"lgdt", "lgdtq", "att">, Requires<[In64BitMode]>; +def : MnemonicAlias<"lidt", "lidtw", "att">, Requires<[In16BitMode]>; +def : MnemonicAlias<"lidt", "lidtl", "att">, Requires<[In32BitMode]>; +def : MnemonicAlias<"lidt", "lidtq", "att">, Requires<[In64BitMode]>; +def : MnemonicAlias<"sgdt", "sgdtw", "att">, Requires<[In16BitMode]>; +def : MnemonicAlias<"sgdt", "sgdtl", "att">, Requires<[In32BitMode]>; +def : MnemonicAlias<"sgdt", "sgdtq", "att">, Requires<[In64BitMode]>; +def : MnemonicAlias<"sidt", "sidtw", "att">, Requires<[In16BitMode]>; +def : MnemonicAlias<"sidt", "sidtl", "att">, Requires<[In32BitMode]>; +def : MnemonicAlias<"sidt", "sidtq", "att">, Requires<[In64BitMode]>; // Floating point stack aliases. diff --git a/lib/Target/X86/X86InstrSystem.td b/lib/Target/X86/X86InstrSystem.td index 4ea4943456..a559909a72 100644 --- a/lib/Target/X86/X86InstrSystem.td +++ b/lib/Target/X86/X86InstrSystem.td @@ -387,12 +387,16 @@ def VERWm : I<0x00, MRM5m, (outs), (ins i16mem:$seg), let SchedRW = [WriteSystem] in { def SGDT16m : I<0x01, MRM0m, (outs opaque48mem:$dst), (ins), "sgdt{w}\t$dst", [], IIC_SGDT>, TB, OpSize, Requires<[Not64BitMode]>; -def SGDTm : I<0x01, MRM0m, (outs opaque48mem:$dst), (ins), - "sgdt\t$dst", [], IIC_SGDT>, OpSize16, TB; +def SGDT32m : I<0x01, MRM0m, (outs opaque48mem:$dst), (ins), + "sgdt{l}\t$dst", [], IIC_SGDT>, OpSize16, TB, Requires <[Not64BitMode]>; +def SGDT64m : I<0x01, MRM0m, (outs opaque80mem:$dst), (ins), + "sgdt{q}\t$dst", [], IIC_SGDT>, TB, Requires <[In64BitMode]>; def SIDT16m : I<0x01, MRM1m, (outs opaque48mem:$dst), (ins), "sidt{w}\t$dst", [], IIC_SIDT>, TB, OpSize, Requires<[Not64BitMode]>; -def SIDTm : I<0x01, MRM1m, (outs opaque48mem:$dst), (ins), - "sidt\t$dst", []>, OpSize16, TB; +def SIDT32m : I<0x01, MRM1m, (outs opaque48mem:$dst), (ins), + "sidt{l}\t$dst", []>, OpSize16, TB, Requires <[Not64BitMode]>; +def SIDT64m : I<0x01, MRM1m, (outs opaque80mem:$dst), (ins), + "sidt{q}\t$dst", []>, TB, Requires <[In64BitMode]>; def SLDT16r : I<0x00, MRM0r, (outs GR16:$dst), (ins), "sldt{w}\t$dst", [], IIC_SLDT>, TB, OpSize; def SLDT16m : I<0x00, MRM0m, (outs i16mem:$dst), (ins), @@ -409,12 +413,16 @@ def SLDT64m : RI<0x00, MRM0m, (outs i16mem:$dst), (ins), def LGDT16m : I<0x01, MRM2m, (outs), (ins opaque48mem:$src), "lgdt{w}\t$src", [], IIC_LGDT>, TB, OpSize, Requires<[Not64BitMode]>; -def LGDTm : I<0x01, MRM2m, (outs), (ins opaque48mem:$src), - "lgdt\t$src", [], IIC_LGDT>, OpSize16, TB; +def LGDT32m : I<0x01, MRM2m, (outs), (ins opaque48mem:$src), + "lgdt{l}\t$src", [], IIC_LGDT>, OpSize16, TB, Requires<[Not64BitMode]>; +def LGDT64m : I<0x01, MRM2m, (outs), (ins opaque80mem:$src), + "lgdt{q}\t$src", [], IIC_LGDT>, TB, Requires<[In64BitMode]>; def LIDT16m : I<0x01, MRM3m, (outs), (ins opaque48mem:$src), "lidt{w}\t$src", [], IIC_LIDT>, TB, OpSize, Requires<[Not64BitMode]>; -def LIDTm : I<0x01, MRM3m, (outs), (ins opaque48mem:$src), - "lidt\t$src", [], IIC_LIDT>, OpSize16, TB; +def LIDT32m : I<0x01, MRM3m, (outs), (ins opaque48mem:$src), + "lidt{l}\t$src", [], IIC_LIDT>, OpSize16, TB, Requires<[Not64BitMode]>; +def LIDT64m : I<0x01, MRM3m, (outs), (ins opaque80mem:$src), + "lidt{q}\t$src", [], IIC_LIDT>, TB, Requires<[In64BitMode]>; def LLDT16r : I<0x00, MRM2r, (outs), (ins GR16:$src), "lldt{w}\t$src", [], IIC_LLDT_REG>, TB; def LLDT16m : I<0x00, MRM2m, (outs), (ins i16mem:$src), |