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authorBill Wendling <isanbard@gmail.com>2007-04-25 21:31:48 +0000
committerBill Wendling <isanbard@gmail.com>2007-04-25 21:31:48 +0000
commit3f3a17dd620210320ac4d0090fcf9a2f58c25b00 (patch)
tree2384fc2946205f71609c50dc986857f08e35658c /lib/Target
parente96f50142e8d12a2e12c3329bffb372e09731dd2 (diff)
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Add SSSE3 as a feature of Core2. Add MMX registers to the list of registers
clobbered by a call. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36448 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target')
-rw-r--r--lib/Target/X86/X86.td2
-rw-r--r--lib/Target/X86/X86InstrInfo.td1
2 files changed, 2 insertions, 1 deletions
diff --git a/lib/Target/X86/X86.td b/lib/Target/X86/X86.td
index 33de92a6bb..94e69f5a36 100644
--- a/lib/Target/X86/X86.td
+++ b/lib/Target/X86/X86.td
@@ -64,7 +64,7 @@ def : Proc<"prescott", [FeatureMMX, FeatureSSE1, FeatureSSE2,
def : Proc<"nocona", [FeatureMMX, FeatureSSE1, FeatureSSE2,
FeatureSSE3, Feature64Bit]>;
def : Proc<"core2", [FeatureMMX, FeatureSSE1, FeatureSSE2,
- FeatureSSE3, Feature64Bit]>;
+ FeatureSSE3, FeatureSSSE3, Feature64Bit]>;
def : Proc<"k6", [FeatureMMX]>;
def : Proc<"k6-2", [FeatureMMX, Feature3DNow]>;
diff --git a/lib/Target/X86/X86InstrInfo.td b/lib/Target/X86/X86InstrInfo.td
index c330bf9908..3362ee30cd 100644
--- a/lib/Target/X86/X86InstrInfo.td
+++ b/lib/Target/X86/X86InstrInfo.td
@@ -458,6 +458,7 @@ def JNO : IBr<0x81, (ops brtarget:$dst), "jno $dst",
let isCall = 1, noResults = 1 in
// All calls clobber the non-callee saved registers...
let Defs = [EAX, ECX, EDX, FP0, FP1, FP2, FP3, FP4, FP5, FP6, ST0,
+ MM0, MM1, MM2, MM3, MM4, MM5, MM6, MM7,
XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7] in {
def CALLpcrel32 : I<0xE8, RawFrm, (ops i32imm:$dst, variable_ops),
"call ${dst:call}", []>;