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| author | Kevin Qin <Kevin.Qin@arm.com> | 2014-01-23 01:35:13 +0000 |
|---|---|---|
| committer | Kevin Qin <Kevin.Qin@arm.com> | 2014-01-23 01:35:13 +0000 |
| commit | 4f046e08ffeb10be89292ce2a1bd36d66dacb2a4 (patch) | |
| tree | 2a802e462b7d84d9910bf139dc73e4158ea565d0 /lib/Target | |
| parent | f9e66a412b67f8713044ef94ad914fb045e99619 (diff) | |
| download | llvm-4f046e08ffeb10be89292ce2a1bd36d66dacb2a4.tar.gz llvm-4f046e08ffeb10be89292ce2a1bd36d66dacb2a4.tar.bz2 llvm-4f046e08ffeb10be89292ce2a1bd36d66dacb2a4.tar.xz | |
fix some spell mistakes around 'ConcatVector' and 'ShuffleVector' in AArch64 backend.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199858 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target')
| -rw-r--r-- | lib/Target/AArch64/AArch64ISelLowering.cpp | 8 | ||||
| -rw-r--r-- | lib/Target/AArch64/AArch64ISelLowering.h | 2 |
2 files changed, 5 insertions, 5 deletions
diff --git a/lib/Target/AArch64/AArch64ISelLowering.cpp b/lib/Target/AArch64/AArch64ISelLowering.cpp index 4aae9e59e2..a794fcdc1f 100644 --- a/lib/Target/AArch64/AArch64ISelLowering.cpp +++ b/lib/Target/AArch64/AArch64ISelLowering.cpp @@ -4154,8 +4154,8 @@ AArch64TargetLowering::isFMAFasterThanFMulAndFAdd(EVT VT) const { return false; } -// Check whether a shuffle_vecotor could be presented as conact_vector. -bool AArch64TargetLowering::isConactVector(SDValue Op,SelectionDAG &DAG, +// Check whether a shuffle_vector could be presented as concat_vector. +bool AArch64TargetLowering::isConcatVector(SDValue Op,SelectionDAG &DAG, SDValue V0, SDValue V1, const int* Mask, SDValue &Res) const { @@ -4465,7 +4465,7 @@ AArch64TargetLowering::LowerBUILD_VECTOR(SDValue Op, SelectionDAG &DAG, return LowerVECTOR_SHUFFLE(Shuffle, DAG); } else { SDValue Res; - if(isConactVector(Op, DAG, V0, V1, Mask, Res)) + if(isConcatVector(Op, DAG, V0, V1, Mask, Res)) return Res; } } @@ -4655,7 +4655,7 @@ AArch64TargetLowering::LowerVECTOR_SHUFFLE(SDValue Op, } SDValue Res; - if (isConactVector(Op, DAG, V1, V2, &ShuffleMask[0], Res)) + if (isConcatVector(Op, DAG, V1, V2, &ShuffleMask[0], Res)) return Res; // If the element of shuffle mask are all the same constant, we can diff --git a/lib/Target/AArch64/AArch64ISelLowering.h b/lib/Target/AArch64/AArch64ISelLowering.h index 8baf992a2b..8961d9c141 100644 --- a/lib/Target/AArch64/AArch64ISelLowering.h +++ b/lib/Target/AArch64/AArch64ISelLowering.h @@ -232,7 +232,7 @@ public: SDLoc dl, SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals) const; - bool isConactVector(SDValue Op,SelectionDAG &DAG, SDValue V0, SDValue V1, + bool isConcatVector(SDValue Op,SelectionDAG &DAG, SDValue V0, SDValue V1, const int* Mask, SDValue &Res) const; bool isKnownShuffleVector(SDValue Op, SelectionDAG &DAG, SDValue &V0, |