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| author | Dan Gohman <gohman@apple.com> | 2011-10-24 17:55:11 +0000 |
|---|---|---|
| committer | Dan Gohman <gohman@apple.com> | 2011-10-24 17:55:11 +0000 |
| commit | 692c1d85353249124caa1885cfeda513146c6d81 (patch) | |
| tree | 039a45c23b4b0e4804476257ced2af1915772ef4 /lib/Target | |
| parent | 334190e47eb28fe749380594992a7ae2e1c7737f (diff) | |
| download | llvm-692c1d85353249124caa1885cfeda513146c6d81.tar.gz llvm-692c1d85353249124caa1885cfeda513146c6d81.tar.bz2 llvm-692c1d85353249124caa1885cfeda513146c6d81.tar.xz | |
Change this overloaded use of Sched::Latency to be an overloaded
use of Sched::ILP instead, as Sched::Latency is going away.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142813 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target')
| -rw-r--r-- | lib/Target/ARM/ARMISelLowering.cpp | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/lib/Target/ARM/ARMISelLowering.cpp b/lib/Target/ARM/ARMISelLowering.cpp index 72ea6ace52..422a40fa6d 100644 --- a/lib/Target/ARM/ARMISelLowering.cpp +++ b/lib/Target/ARM/ARMISelLowering.cpp @@ -986,7 +986,7 @@ Sched::Preference ARMTargetLowering::getSchedulingPreference(SDNode *N) const { if (VT == MVT::Glue || VT == MVT::Other) continue; if (VT.isFloatingPoint() || VT.isVector()) - return Sched::Latency; + return Sched::ILP; } if (!N->isMachineOpcode()) @@ -1001,7 +1001,7 @@ Sched::Preference ARMTargetLowering::getSchedulingPreference(SDNode *N) const { return Sched::RegPressure; if (!Itins->isEmpty() && Itins->getOperandCycle(MCID.getSchedClass(), 0) > 2) - return Sched::Latency; + return Sched::ILP; return Sched::RegPressure; } |