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| author | Adhemerval Zanella <azanella@linux.vnet.ibm.com> | 2012-11-15 20:56:03 +0000 |
|---|---|---|
| committer | Adhemerval Zanella <azanella@linux.vnet.ibm.com> | 2012-11-15 20:56:03 +0000 |
| commit | e95ed2b7afbe37f1831cb6d8d46d09ccb5cd6b7f (patch) | |
| tree | 2fce84120fec81262df81d218a69baab6e6bc288 /lib/Target | |
| parent | 71e5ea88604161e2e1effe20486ab3bcb363645f (diff) | |
| download | llvm-e95ed2b7afbe37f1831cb6d8d46d09ccb5cd6b7f.tar.gz llvm-e95ed2b7afbe37f1831cb6d8d46d09ccb5cd6b7f.tar.bz2 llvm-e95ed2b7afbe37f1831cb6d8d46d09ccb5cd6b7f.tar.xz | |
PowerPC: Lowering floor intrinsic for Altivec
This patch lowers the llvm.floor, llvm.ceil, llvm.trunc, and
llvm.nearbyint to Altivec instruction when using 4 single-precision
float vectors.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168086 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target')
| -rw-r--r-- | lib/Target/PowerPC/PPCISelLowering.cpp | 4 | ||||
| -rw-r--r-- | lib/Target/PowerPC/PPCInstrAltivec.td | 10 |
2 files changed, 14 insertions, 0 deletions
diff --git a/lib/Target/PowerPC/PPCISelLowering.cpp b/lib/Target/PowerPC/PPCISelLowering.cpp index d51baa6a57..7d97450676 100644 --- a/lib/Target/PowerPC/PPCISelLowering.cpp +++ b/lib/Target/PowerPC/PPCISelLowering.cpp @@ -402,6 +402,10 @@ PPCTargetLowering::PPCTargetLowering(PPCTargetMachine &TM) setOperationAction(ISD::FP_TO_UINT, MVT::v4i32, Legal); setOperationAction(ISD::SINT_TO_FP, MVT::v4i32, Legal); setOperationAction(ISD::UINT_TO_FP, MVT::v4i32, Legal); + setOperationAction(ISD::FFLOOR, MVT::v4f32, Legal); + setOperationAction(ISD::FCEIL, MVT::v4f32, Legal); + setOperationAction(ISD::FTRUNC, MVT::v4f32, Legal); + setOperationAction(ISD::FNEARBYINT, MVT::v4f32, Legal); addRegisterClass(MVT::v4f32, &PPC::VRRCRegClass); addRegisterClass(MVT::v4i32, &PPC::VRRCRegClass); diff --git a/lib/Target/PowerPC/PPCInstrAltivec.td b/lib/Target/PowerPC/PPCInstrAltivec.td index ba58c3e4ac..87758e90fb 100644 --- a/lib/Target/PowerPC/PPCInstrAltivec.td +++ b/lib/Target/PowerPC/PPCInstrAltivec.td @@ -721,3 +721,13 @@ def : Pat<(v4f32 (sint_to_fp (v4i32 VRRC:$vA))), (VCFSX_0 VRRC:$vA)>; def : Pat<(v4f32 (uint_to_fp (v4i32 VRRC:$vA))), (VCFUX_0 VRRC:$vA)>; + +// Floating-point rounding +def : Pat<(v4f32 (ffloor (v4f32 VRRC:$vA))), + (VRFIM VRRC:$vA)>; +def : Pat<(v4f32 (fceil (v4f32 VRRC:$vA))), + (VRFIP VRRC:$vA)>; +def : Pat<(v4f32 (ftrunc (v4f32 VRRC:$vA))), + (VRFIZ VRRC:$vA)>; +def : Pat<(v4f32 (fnearbyint (v4f32 VRRC:$vA))), + (VRFIN VRRC:$vA)>; |