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| author | Jim Grosbach <grosbach@apple.com> | 2011-10-24 17:16:24 +0000 |
|---|---|---|
| committer | Jim Grosbach <grosbach@apple.com> | 2011-10-24 17:16:24 +0000 |
| commit | f8e74f816df2d0b83e3fe08da3dff4e8c2421e5e (patch) | |
| tree | 0a7ecf8efed0f00871b8d96002a4f60389749c69 /lib/Target | |
| parent | d2dae0cfa00ca3c5164b2543ed712ace6c08386b (diff) | |
| download | llvm-f8e74f816df2d0b83e3fe08da3dff4e8c2421e5e.tar.gz llvm-f8e74f816df2d0b83e3fe08da3dff4e8c2421e5e.tar.bz2 llvm-f8e74f816df2d0b83e3fe08da3dff4e8c2421e5e.tar.xz | |
Thumb2 LDM instructions can target PC. Make sure to encode it.
PR11220
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142801 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target')
| -rw-r--r-- | lib/Target/ARM/ARMInstrThumb2.td | 12 |
1 files changed, 4 insertions, 8 deletions
diff --git a/lib/Target/ARM/ARMInstrThumb2.td b/lib/Target/ARM/ARMInstrThumb2.td index 9d8505544d..a65a75f8e3 100644 --- a/lib/Target/ARM/ARMInstrThumb2.td +++ b/lib/Target/ARM/ARMInstrThumb2.td @@ -1543,8 +1543,7 @@ multiclass thumb2_ld_mult<string asm, InstrItinClass itin, let Inst{21} = 0; // No writeback let Inst{20} = L_bit; let Inst{19-16} = Rn; - let Inst{15} = 0; - let Inst{14-0} = regs{14-0}; + let Inst{15-0} = regs; } def IA_UPD : T2XIt<(outs GPR:$wb), (ins GPR:$Rn, pred:$p, reglist:$regs, variable_ops), @@ -1559,8 +1558,7 @@ multiclass thumb2_ld_mult<string asm, InstrItinClass itin, let Inst{21} = 1; // Writeback let Inst{20} = L_bit; let Inst{19-16} = Rn; - let Inst{15} = 0; - let Inst{14-0} = regs{14-0}; + let Inst{15-0} = regs; } def DB : T2XI<(outs), (ins GPR:$Rn, pred:$p, reglist:$regs, variable_ops), @@ -1575,8 +1573,7 @@ multiclass thumb2_ld_mult<string asm, InstrItinClass itin, let Inst{21} = 0; // No writeback let Inst{20} = L_bit; let Inst{19-16} = Rn; - let Inst{15} = 0; - let Inst{14-0} = regs{14-0}; + let Inst{15-0} = regs; } def DB_UPD : T2XIt<(outs GPR:$wb), (ins GPR:$Rn, pred:$p, reglist:$regs, variable_ops), @@ -1591,8 +1588,7 @@ multiclass thumb2_ld_mult<string asm, InstrItinClass itin, let Inst{21} = 1; // Writeback let Inst{20} = L_bit; let Inst{19-16} = Rn; - let Inst{15} = 0; - let Inst{14-0} = regs{14-0}; + let Inst{15-0} = regs; } } |