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author | Rafael Espindola <rafael.espindola@gmail.com> | 2014-05-28 15:30:40 +0000 |
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committer | Rafael Espindola <rafael.espindola@gmail.com> | 2014-05-28 15:30:40 +0000 |
commit | e8075c6877d1f2e1be6c2646135912406616249c (patch) | |
tree | d81d3c860f30aa2b7230f2b5a20d858f5324b5ae /lib/Transforms/InstCombine | |
parent | b8af23fe1ecc74021e2cc5a3ad1ecdcbbcb65c4e (diff) | |
download | llvm-e8075c6877d1f2e1be6c2646135912406616249c.tar.gz llvm-e8075c6877d1f2e1be6c2646135912406616249c.tar.bz2 llvm-e8075c6877d1f2e1be6c2646135912406616249c.tar.xz |
InstCombine: Improvement to check if signed addition overflows.
This patch implements two things:
1. If we know one number is positive and another is negative, we return true as
signed addition of two opposite signed numbers will never overflow.
2. Implemented TODO : If one of the operands only has one non-zero bit, and if
the other operand has a known-zero bit in a more significant place than it
(not including the sign bit) the ripple may go up to and fill the zero, but
won't change the sign. e.x - (x & ~4) + 1
We make sure that we are ignoring 0 at MSB.
Patch by Suyog Sarda.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209746 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Transforms/InstCombine')
-rw-r--r-- | lib/Transforms/InstCombine/InstCombineAddSub.cpp | 50 |
1 files changed, 44 insertions, 6 deletions
diff --git a/lib/Transforms/InstCombine/InstCombineAddSub.cpp b/lib/Transforms/InstCombine/InstCombineAddSub.cpp index c37a9cf2ef..eca4e4a787 100644 --- a/lib/Transforms/InstCombine/InstCombineAddSub.cpp +++ b/lib/Transforms/InstCombine/InstCombineAddSub.cpp @@ -889,11 +889,34 @@ static inline Value *dyn_castFoldableMul(Value *V, Constant *&CST) { return nullptr; } +// If one of the operands only has one non-zero bit, and if the other +// operand has a known-zero bit in a more significant place than it (not +// including the sign bit) the ripple may go up to and fill the zero, but +// won't change the sign. For example, (X & ~4) + 1. +// FIXME: Handle case where LHS has a zero before the 1 in the RHS, but also +// has one after. +static bool CheckRippleForAdd(APInt Op0KnownZero, APInt Op0KnownOne, + APInt Op1KnownZero, APInt Op1KnownOne) { + // Make sure that one of the operand has only one bit set to 1 and all other + // bit set to 0. + if ((~Op1KnownZero).countPopulation() == 1) { + int BitWidth = Op0KnownZero.getBitWidth(); + // Ignore Sign Bit. + Op0KnownZero.clearBit(BitWidth - 1); + int Op1OnePosition = BitWidth - Op1KnownOne.countLeadingZeros() - 1; + int Op0ZeroPosition = BitWidth - Op0KnownZero.countLeadingZeros() - 1; + if ((Op0ZeroPosition != (BitWidth - 1)) && + (Op0ZeroPosition >= Op1OnePosition)) + return true; + } + return false; +} /// WillNotOverflowSignedAdd - Return true if we can prove that: /// (sext (add LHS, RHS)) === (add (sext LHS), (sext RHS)) /// This basically requires proving that the add in the original type would not /// overflow to change the sign bit or have a carry out. +/// TODO: Handle this for Vectors. bool InstCombiner::WillNotOverflowSignedAdd(Value *LHS, Value *RHS) { // There are different heuristics we can use for this. Here are some simple // ones. @@ -905,14 +928,29 @@ bool InstCombiner::WillNotOverflowSignedAdd(Value *LHS, Value *RHS) { if (ComputeNumSignBits(LHS) > 1 && ComputeNumSignBits(RHS) > 1) return true; + if (IntegerType *IT = dyn_cast<IntegerType>(LHS->getType())) { - // If one of the operands only has one non-zero bit, and if the other operand - // has a known-zero bit in a more significant place than it (not including the - // sign bit) the ripple may go up to and fill the zero, but won't change the - // sign. For example, (X & ~4) + 1. - - // TODO: Implement. + int BitWidth = IT->getBitWidth(); + APInt LHSKnownZero(BitWidth, 0, /*isSigned*/ true); + APInt LHSKnownOne(BitWidth, 0, /*isSigned*/ true); + computeKnownBits(LHS, LHSKnownZero, LHSKnownOne); + APInt RHSKnownZero(BitWidth, 0, /*isSigned*/ true); + APInt RHSKnownOne(BitWidth, 0, /*isSigned*/ true); + computeKnownBits(RHS, RHSKnownZero, RHSKnownOne); + + // Addition of two 2's compliment numbers having opposite signs will never + // overflow. + if ((LHSKnownOne[BitWidth - 1] && RHSKnownZero[BitWidth - 1]) || + (LHSKnownZero[BitWidth - 1] && RHSKnownOne[BitWidth - 1])) + return true; + + // Check if carry bit of addition will not cause overflow. + if (CheckRippleForAdd(LHSKnownZero, LHSKnownOne, RHSKnownZero, RHSKnownOne)) + return true; + if (CheckRippleForAdd(RHSKnownZero, RHSKnownOne, LHSKnownZero, LHSKnownOne)) + return true; + } return false; } |