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authorReid Spencer <rspencer@reidspencer.com>2006-11-02 01:53:59 +0000
committerReid Spencer <rspencer@reidspencer.com>2006-11-02 01:53:59 +0000
commit0a783f783ca05c961234385f5b269d4cf03dbbdb (patch)
tree70d2d2b4be7b0f5624d954fd3c482eca33c7f43e /lib/Transforms/Scalar/PredicateSimplifier.cpp
parent0ac6757586b80d0c82a6651780dcd9b09df251b0 (diff)
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For PR950:
Replace the REM instruction with UREM, SREM and FREM. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31369 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Transforms/Scalar/PredicateSimplifier.cpp')
-rw-r--r--lib/Transforms/Scalar/PredicateSimplifier.cpp4
1 files changed, 3 insertions, 1 deletions
diff --git a/lib/Transforms/Scalar/PredicateSimplifier.cpp b/lib/Transforms/Scalar/PredicateSimplifier.cpp
index c4ffa4e990..b47afbd605 100644
--- a/lib/Transforms/Scalar/PredicateSimplifier.cpp
+++ b/lib/Transforms/Scalar/PredicateSimplifier.cpp
@@ -788,10 +788,12 @@ void PredicateSimplifier::Forwards::visitBinaryOperator(BinaryOperator &BO) {
Instruction::BinaryOps ops = BO.getOpcode();
switch (ops) {
+ case Instruction::URem:
+ case Instruction::SRem:
case Instruction::UDiv:
case Instruction::SDiv:
case Instruction::FDiv:
- case Instruction::Rem: {
+ case Instruction::FRem: {
Value *Divisor = BO.getOperand(1);
KP.addNotEqual(Constant::getNullValue(Divisor->getType()), Divisor);
break;