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| author | Derek Schuff <dschuff@google.com> | 2013-04-18 17:41:08 +0000 |
|---|---|---|
| committer | Derek Schuff <dschuff@google.com> | 2013-04-18 17:41:08 +0000 |
| commit | 2061dcf0e4266c487185f1b3d8e23b93e2dd68fb (patch) | |
| tree | f8fae2e562fa6d2839d321e4a7481e6724d746cc /lib/Transforms/Scalar/ScalarReplAggregates.cpp | |
| parent | a3fb330d05e85107d01ecf133355d0c6a88196fd (diff) | |
| download | llvm-2061dcf0e4266c487185f1b3d8e23b93e2dd68fb.tar.gz llvm-2061dcf0e4266c487185f1b3d8e23b93e2dd68fb.tar.bz2 llvm-2061dcf0e4266c487185f1b3d8e23b93e2dd68fb.tar.xz | |
Allow misaligned stores in x86 fast-isel.
In X86FastISel::X86SelectStore(), improperly aligned stores are rejected and
handled by the DAG-based ISel. However, X86FastISel::X86SelectLoad() makes
no such requirement. There doesn't appear to be an x86 architectural
correctness issue with allowing potentially unaligned store instructions.
This patch removes this restriction.
Patch by Jim Stichnot.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179774 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Transforms/Scalar/ScalarReplAggregates.cpp')
0 files changed, 0 insertions, 0 deletions