Make the mem2reg interface use an ArrayRef as it keeps a copy of these

to iterate over.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186788 91177308-0d34-0410-b5e6-96231b3b80d8

1 files changed, 6 insertions, 5 deletions

diff --git a/lib/Transforms/Utils/PromoteMemoryToRegister.cpp b/lib/Transforms/Utils/PromoteMemoryToRegister.cpp
index 5ee812bbe8..b4ee4cb87f 100644
--- a/lib/Transforms/Utils/PromoteMemoryToRegister.cpp
+++ b/lib/Transforms/Utils/PromoteMemoryToRegister.cpp
@@ -27,6 +27,7 @@
 
 #define DEBUG_TYPE "mem2reg"
 #include "llvm/Transforms/Utils/PromoteMemToReg.h"
+#include "llvm/ADT/ArrayRef.h"
 #include "llvm/ADT/DenseMap.h"
 #include "llvm/ADT/Hashing.h"
 #include "llvm/ADT/STLExtras.h"
@@ -279,10 +280,10 @@ struct PromoteMem2Reg {
   DenseMap<const BasicBlock *, unsigned> BBNumPreds;
 
 public:
-  PromoteMem2Reg(const std::vector<AllocaInst *> &Allocas, DominatorTree &DT,
+  PromoteMem2Reg(ArrayRef<AllocaInst *> Allocas, DominatorTree &DT,
                  AliasSetTracker *AST)
-      : Allocas(Allocas), DT(DT), DIB(*DT.getRoot()->getParent()->getParent()),
-        AST(AST) {}
+      : Allocas(Allocas.begin(), Allocas.end()), DT(DT),
+        DIB(*DT.getRoot()->getParent()->getParent()), AST(AST) {}
 
   void run();
 
@@ -1089,8 +1090,8 @@ NextIteration:
   goto NextIteration;
 }
 
-void llvm::PromoteMemToReg(const std::vector<AllocaInst *> &Allocas,
-                           DominatorTree &DT, AliasSetTracker *AST) {
+void llvm::PromoteMemToReg(ArrayRef<AllocaInst *> Allocas, DominatorTree &DT,
+                           AliasSetTracker *AST) {
   // If there is nothing to do, bail out...
   if (Allocas.empty())
     return;