For PR950:

This patch converts the old SHR instruction into two instructions,
AShr (Arithmetic) and LShr (Logical). The Shr instructions now are not
dependent on the sign of their operands.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31542 91177308-0d34-0410-b5e6-96231b3b80d8

1 files changed, 0 insertions, 11 deletions

diff --git a/lib/VMCore/Instructions.cpp b/lib/VMCore/Instructions.cpp
index 3825d85763..5ed07cfb7f 100644
--- a/lib/VMCore/Instructions.cpp
+++ b/lib/VMCore/Instructions.cpp
@@ -1222,17 +1222,6 @@ bool BinaryOperator::swapOperands() {
   return false;
 }
 
-
-//===----------------------------------------------------------------------===//
-//                               ShiftInst Class
-//===----------------------------------------------------------------------===//
-
-/// isLogicalShift - Return true if this is a logical shift left or a logical
-/// shift right.
-bool ShiftInst::isLogicalShift() const {
-  return getOpcode() == Instruction::Shl || getType()->isUnsigned();
-}
-
 //===----------------------------------------------------------------------===//
 //                                CastInst Class
 //===----------------------------------------------------------------------===//