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author | Reid Spencer <rspencer@reidspencer.com> | 2007-02-02 02:16:23 +0000 |
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committer | Reid Spencer <rspencer@reidspencer.com> | 2007-02-02 02:16:23 +0000 |
commit | 832254e1c2387c0cbeb0a820b8315fbe85cb003a (patch) | |
tree | d3d0c15237b69dfda4ea152775417f2cc67b369b /lib/VMCore/Verifier.cpp | |
parent | 9a2ef9509e76869c3d658fb3e321d9b9e9d479d9 (diff) | |
download | llvm-832254e1c2387c0cbeb0a820b8315fbe85cb003a.tar.gz llvm-832254e1c2387c0cbeb0a820b8315fbe85cb003a.tar.bz2 llvm-832254e1c2387c0cbeb0a820b8315fbe85cb003a.tar.xz |
Changes to support making the shift instructions be true BinaryOperators.
This feature is needed in order to support shifts of more than 255 bits
on large integer types. This changes the syntax for llvm assembly to
make shl, ashr and lshr instructions look like a binary operator:
shl i32 %X, 1
instead of
shl i32 %X, i8 1
Additionally, this should help a few passes perform additional optimizations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33776 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/VMCore/Verifier.cpp')
-rw-r--r-- | lib/VMCore/Verifier.cpp | 29 |
1 files changed, 15 insertions, 14 deletions
diff --git a/lib/VMCore/Verifier.cpp b/lib/VMCore/Verifier.cpp index 59be4a45a3..9dc892e5ae 100644 --- a/lib/VMCore/Verifier.cpp +++ b/lib/VMCore/Verifier.cpp @@ -196,7 +196,6 @@ namespace { // Anonymous namespace for class void visitBinaryOperator(BinaryOperator &B); void visitICmpInst(ICmpInst &IC); void visitFCmpInst(FCmpInst &FC); - void visitShiftInst(ShiftInst &SI); void visitExtractElementInst(ExtractElementInst &EI); void visitInsertElementInst(InsertElementInst &EI); void visitShuffleVectorInst(ShuffleVectorInst &EI); @@ -713,9 +712,11 @@ void Verifier::visitBinaryOperator(BinaryOperator &B) { Assert1(B.getOperand(0)->getType() == B.getOperand(1)->getType(), "Both operands to a binary operator are not of the same type!", &B); + switch (B.getOpcode()) { // Check that logical operators are only used with integral operands. - if (B.getOpcode() == Instruction::And || B.getOpcode() == Instruction::Or || - B.getOpcode() == Instruction::Xor) { + case Instruction::And: + case Instruction::Or: + case Instruction::Xor: Assert1(B.getType()->isInteger() || (isa<PackedType>(B.getType()) && cast<PackedType>(B.getType())->getElementType()->isInteger()), @@ -723,7 +724,16 @@ void Verifier::visitBinaryOperator(BinaryOperator &B) { Assert1(B.getType() == B.getOperand(0)->getType(), "Logical operators must have same type for operands and result!", &B); - } else { + break; + case Instruction::Shl: + case Instruction::LShr: + case Instruction::AShr: + Assert1(B.getType()->isInteger(), + "Shift must return an integer result!", &B); + Assert1(B.getType() == B.getOperand(0)->getType(), + "Shift return type must be same as operands!", &B); + /* FALL THROUGH */ + default: // Arithmetic operators only work on integer or fp values Assert1(B.getType() == B.getOperand(0)->getType(), "Arithmetic operators must have same type for operands and result!", @@ -731,6 +741,7 @@ void Verifier::visitBinaryOperator(BinaryOperator &B) { Assert1(B.getType()->isInteger() || B.getType()->isFloatingPoint() || isa<PackedType>(B.getType()), "Arithmetic operators must have integer, fp, or packed type!", &B); + break; } visitInstruction(B); @@ -760,16 +771,6 @@ void Verifier::visitFCmpInst(FCmpInst& FC) { visitInstruction(FC); } -void Verifier::visitShiftInst(ShiftInst &SI) { - Assert1(SI.getType()->isInteger(), - "Shift must return an integer result!", &SI); - Assert1(SI.getType() == SI.getOperand(0)->getType(), - "Shift return type must be same as first operand!", &SI); - Assert1(SI.getOperand(1)->getType() == Type::Int8Ty, - "Second operand to shift must be ubyte type!", &SI); - visitInstruction(SI); -} - void Verifier::visitExtractElementInst(ExtractElementInst &EI) { Assert1(ExtractElementInst::isValidOperands(EI.getOperand(0), EI.getOperand(1)), |