diff options
| author | Abdoulaye Walsimou Gaye <awg@embtoolkit.org> | 2014-06-28 13:02:32 +0200 |
|---|---|---|
| committer | Abdoulaye Walsimou Gaye <awg@embtoolkit.org> | 2014-06-28 13:02:32 +0200 |
| commit | 579be9445d57b5da59d6651baffdb0c744c4c309 (patch) | |
| tree | fed74d0669126fa2c8d44eeac74188372d7b8d9f /lib | |
| parent | e14f1e044839fba347babb41259f89867bac4d46 (diff) | |
| parent | 5c6aa738fb3325ae499454877f1e2926d2368135 (diff) | |
| download | llvm-embtk-support-release-3.4.tar.gz llvm-embtk-support-release-3.4.tar.bz2 llvm-embtk-support-release-3.4.tar.xz | |
Merge branch 'release-3.4' into embtk-support-release-3.4embtk-support-release-3.4
Diffstat (limited to 'lib')
| -rw-r--r-- | lib/Target/PowerPC/PPCCTRLoops.cpp | 8 | ||||
| -rw-r--r-- | lib/Target/R600/AMDGPUCallingConv.td | 2 |
2 files changed, 9 insertions, 1 deletions
diff --git a/lib/Target/PowerPC/PPCCTRLoops.cpp b/lib/Target/PowerPC/PPCCTRLoops.cpp index e419b9b40d..819635c5d8 100644 --- a/lib/Target/PowerPC/PPCCTRLoops.cpp +++ b/lib/Target/PowerPC/PPCCTRLoops.cpp @@ -369,6 +369,14 @@ bool PPCCTRLoops::mightUseCTR(const Triple &TT, BasicBlock *BB) { J->getOpcode() == Instruction::URem || J->getOpcode() == Instruction::SRem)) { return true; + } else if (TT.isArch32Bit() && + isLargeIntegerTy(false, J->getType()->getScalarType()) && + (J->getOpcode() == Instruction::Shl || + J->getOpcode() == Instruction::AShr || + J->getOpcode() == Instruction::LShr)) { + // Only on PPC32, for 128-bit integers (specifically not 64-bit + // integers), these might be runtime calls. + return true; } else if (isa<IndirectBrInst>(J) || isa<InvokeInst>(J)) { // On PowerPC, indirect jumps use the counter register. return true; diff --git a/lib/Target/R600/AMDGPUCallingConv.td b/lib/Target/R600/AMDGPUCallingConv.td index 65cdb24673..5f8ad8c3b1 100644 --- a/lib/Target/R600/AMDGPUCallingConv.td +++ b/lib/Target/R600/AMDGPUCallingConv.td @@ -20,7 +20,7 @@ def CC_SI : CallingConv<[ CCIfInReg<CCIfType<[f32, i32] , CCAssignToReg<[ SGPR0, SGPR1, SGPR2, SGPR3, SGPR4, SGPR5, SGPR6, SGPR7, SGPR8, SGPR9, SGPR10, SGPR11, SGPR12, SGPR13, SGPR14, SGPR15, - SGPR16 + SGPR16, SGPR17, SGPR18, SGPR19, SGPR20, SGPR21 ]>>>, CCIfInReg<CCIfType<[i64] , CCAssignToRegWithShadow< |