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author | Richard Sandiford <rsandifo@linux.vnet.ibm.com> | 2013-10-01 14:33:55 +0000 |
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committer | Richard Sandiford <rsandifo@linux.vnet.ibm.com> | 2013-10-01 14:33:55 +0000 |
commit | 00f5335ea0b62f0921d215a4d04e2fe5f33771ce (patch) | |
tree | 56a9decf33dd665bb28cb2fc2fde2cb11aff6ecd /lib | |
parent | bba9390fc6c0d536172c6bb4a9c93db557c1aff4 (diff) | |
download | llvm-00f5335ea0b62f0921d215a4d04e2fe5f33771ce.tar.gz llvm-00f5335ea0b62f0921d215a4d04e2fe5f33771ce.tar.bz2 llvm-00f5335ea0b62f0921d215a4d04e2fe5f33771ce.tar.xz |
[SystemZ] Extend pseudo conditional 8- and 16-bit stores to high words
As the comment says, we always want to use STOC for 32-bit stores.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191767 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
-rw-r--r-- | lib/Target/SystemZ/SystemZISelLowering.cpp | 8 | ||||
-rw-r--r-- | lib/Target/SystemZ/SystemZInstrInfo.td | 20 |
2 files changed, 22 insertions, 6 deletions
diff --git a/lib/Target/SystemZ/SystemZISelLowering.cpp b/lib/Target/SystemZ/SystemZISelLowering.cpp index 4785f75d69..f9cc3b8d15 100644 --- a/lib/Target/SystemZ/SystemZISelLowering.cpp +++ b/lib/Target/SystemZ/SystemZISelLowering.cpp @@ -2893,6 +2893,14 @@ EmitInstrWithCustomInserter(MachineInstr *MI, MachineBasicBlock *MBB) const { case SystemZ::SelectF128: return emitSelect(MI, MBB); + case SystemZ::CondStore8Mux: + return emitCondStore(MI, MBB, SystemZ::STCMux, 0, false); + case SystemZ::CondStore8MuxInv: + return emitCondStore(MI, MBB, SystemZ::STCMux, 0, true); + case SystemZ::CondStore16Mux: + return emitCondStore(MI, MBB, SystemZ::STHMux, 0, false); + case SystemZ::CondStore16MuxInv: + return emitCondStore(MI, MBB, SystemZ::STHMux, 0, true); case SystemZ::CondStore8: return emitCondStore(MI, MBB, SystemZ::STC, 0, false); case SystemZ::CondStore8Inv: diff --git a/lib/Target/SystemZ/SystemZInstrInfo.td b/lib/Target/SystemZ/SystemZInstrInfo.td index bf333b5ee8..88508e33c5 100644 --- a/lib/Target/SystemZ/SystemZInstrInfo.td +++ b/lib/Target/SystemZ/SystemZInstrInfo.td @@ -202,12 +202,20 @@ def Select32Mux : SelectWrapper<GRX32>, Requires<[FeatureHighWord]>; def Select32 : SelectWrapper<GR32>; def Select64 : SelectWrapper<GR64>; -defm CondStore8 : CondStores<GR32, nonvolatile_truncstorei8, - nonvolatile_anyextloadi8, bdxaddr20only>; -defm CondStore16 : CondStores<GR32, nonvolatile_truncstorei16, - nonvolatile_anyextloadi16, bdxaddr20only>; -defm CondStore32 : CondStores<GR32, nonvolatile_store, - nonvolatile_load, bdxaddr20only>; +// We don't define 32-bit Mux stores because the low-only STOC should +// always be used if possible. +defm CondStore8Mux : CondStores<GRX32, nonvolatile_truncstorei8, + nonvolatile_anyextloadi8, bdxaddr20only>, + Requires<[FeatureHighWord]>; +defm CondStore16Mux : CondStores<GRX32, nonvolatile_truncstorei16, + nonvolatile_anyextloadi16, bdxaddr20only>, + Requires<[FeatureHighWord]>; +defm CondStore8 : CondStores<GR32, nonvolatile_truncstorei8, + nonvolatile_anyextloadi8, bdxaddr20only>; +defm CondStore16 : CondStores<GR32, nonvolatile_truncstorei16, + nonvolatile_anyextloadi16, bdxaddr20only>; +defm CondStore32 : CondStores<GR32, nonvolatile_store, + nonvolatile_load, bdxaddr20only>; defm : CondStores64<CondStore8, CondStore8Inv, nonvolatile_truncstorei8, nonvolatile_anyextloadi8, bdxaddr20only>; |