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author | Akira Hatanaka <ahatanak@gmail.com> | 2011-09-26 21:37:50 +0000 |
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committer | Akira Hatanaka <ahatanak@gmail.com> | 2011-09-26 21:37:50 +0000 |
commit | 09dd60feef61bc59a71585e05580c142a15bbcf0 (patch) | |
tree | 25b3232c72bfb55ea779f2f2eca896a44f862d2d /lib | |
parent | 47d3ee559a4bbac97db38c84e9c89e56eedc6fb9 (diff) | |
download | llvm-09dd60feef61bc59a71585e05580c142a15bbcf0.tar.gz llvm-09dd60feef61bc59a71585e05580c142a15bbcf0.tar.bz2 llvm-09dd60feef61bc59a71585e05580c142a15bbcf0.tar.xz |
In single float mode, double precision FP arguments are passed in integer
registers, so there is no need to check here.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140568 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
-rw-r--r-- | lib/Target/Mips/MipsISelLowering.cpp | 7 |
1 files changed, 3 insertions, 4 deletions
diff --git a/lib/Target/Mips/MipsISelLowering.cpp b/lib/Target/Mips/MipsISelLowering.cpp index 77650c7ef0..130e359c63 100644 --- a/lib/Target/Mips/MipsISelLowering.cpp +++ b/lib/Target/Mips/MipsISelLowering.cpp @@ -2267,10 +2267,9 @@ MipsTargetLowering::LowerFormalArguments(SDValue Chain, RC = Mips::CPU64RegsRegisterClass; else if (RegVT == MVT::f32) RC = Mips::FGR32RegisterClass; - else if (RegVT == MVT::f64) { - if (!Subtarget->isSingleFloat()) - RC = Mips::AFGR64RegisterClass; - } else + else if (RegVT == MVT::f64) + RC = Mips::AFGR64RegisterClass; + else llvm_unreachable("RegVT not supported by FormalArguments Lowering"); // Transform the arguments stored on |