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| author | Daniel Sanders <daniel.sanders@imgtec.com> | 2014-06-11 15:48:00 +0000 |
|---|---|---|
| committer | Daniel Sanders <daniel.sanders@imgtec.com> | 2014-06-11 15:48:00 +0000 |
| commit | 0ee5398b7fb951beca94135b710715ca5547e6a3 (patch) | |
| tree | edfcc0b9ebb546f78ed5910b5b278c05fabaec86 /lib | |
| parent | 6b3f3922bf7bf933617adca7cbe0fd12a8fd1635 (diff) | |
| download | llvm-0ee5398b7fb951beca94135b710715ca5547e6a3.tar.gz llvm-0ee5398b7fb951beca94135b710715ca5547e6a3.tar.bz2 llvm-0ee5398b7fb951beca94135b710715ca5547e6a3.tar.xz | |
[mips][mips64r6] Improve tests affected by the changes to multiplies and divides
Summary:
MIPS32r6/MIPS64r6 support has not been added yet.
inlineasm-cnstrnt-reg.ll:
Explicitly specify the CPU since it will not work on MIPS32r6/MIPS64r6
when -integrated-as is the default. We can't change the mnemonic since the
LO register is an implicit def of mtlo and MIPS32r6/MIPS64r6 has no
instructions that use LO.
2008-08-01-AsmInline.ll:
Explicitly specify the CPU since MIPS32r6/MIPS64r6 will correctly emit
different code and this is a regression test.
mips64instrs.ll and mips64muldiv.ll
Check registers and the way the multiply is used in m1
divrem.ll
Check registers and use multiple filecheck prefixes to limit redundancy
Reviewers: vmedic, jkolek, zoran.jovanovic, matheusalmeida
Reviewed By: matheusalmeida
Subscribers: matheusalmeida
Differential Revision: http://reviews.llvm.org/D3894
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210656 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
0 files changed, 0 insertions, 0 deletions