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author | Venkatraman Govindaraju <venkatra@cs.wisc.edu> | 2014-01-12 04:34:31 +0000 |
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committer | Venkatraman Govindaraju <venkatra@cs.wisc.edu> | 2014-01-12 04:34:31 +0000 |
commit | 188fbacade4772757363045ab417927d525e57f6 (patch) | |
tree | 3f0e6fec80d6569120fb7773b1ae582034aa188b /lib | |
parent | 1655be290cf871f22b1da1fc700ad9e1deab2a01 (diff) | |
download | llvm-188fbacade4772757363045ab417927d525e57f6.tar.gz llvm-188fbacade4772757363045ab417927d525e57f6.tar.bz2 llvm-188fbacade4772757363045ab417927d525e57f6.tar.xz |
[Sparc] Replace (unsigned)-1 with ~OU as suggested by Reid Kleckner.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199031 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
-rw-r--r-- | lib/Target/Sparc/Disassembler/SparcDisassembler.cpp | 18 |
1 files changed, 9 insertions, 9 deletions
diff --git a/lib/Target/Sparc/Disassembler/SparcDisassembler.cpp b/lib/Target/Sparc/Disassembler/SparcDisassembler.cpp index d8c776eae4..6233805431 100644 --- a/lib/Target/Sparc/Disassembler/SparcDisassembler.cpp +++ b/lib/Target/Sparc/Disassembler/SparcDisassembler.cpp @@ -104,14 +104,14 @@ static const unsigned DFPRegDecoderTable[] = { SP::D14, SP::D30, SP::D15, SP::D31 }; static const unsigned QFPRegDecoderTable[] = { - SP::Q0, SP::Q8, (unsigned)-1, (unsigned)-1, - SP::Q1, SP::Q9, (unsigned)-1, (unsigned)-1, - SP::Q2, SP::Q10, (unsigned)-1, (unsigned)-1, - SP::Q3, SP::Q11, (unsigned)-1, (unsigned)-1, - SP::Q4, SP::Q12, (unsigned)-1, (unsigned)-1, - SP::Q5, SP::Q13, (unsigned)-1, (unsigned)-1, - SP::Q6, SP::Q14, (unsigned)-1, (unsigned)-1, - SP::Q7, SP::Q15, (unsigned)-1, (unsigned)-1 } ; + SP::Q0, SP::Q8, ~0U, ~0U, + SP::Q1, SP::Q9, ~0U, ~0U, + SP::Q2, SP::Q10, ~0U, ~0U, + SP::Q3, SP::Q11, ~0U, ~0U, + SP::Q4, SP::Q12, ~0U, ~0U, + SP::Q5, SP::Q13, ~0U, ~0U, + SP::Q6, SP::Q14, ~0U, ~0U, + SP::Q7, SP::Q15, ~0U, ~0U } ; static DecodeStatus DecodeIntRegsRegisterClass(MCInst &Inst, unsigned RegNo, @@ -168,7 +168,7 @@ static DecodeStatus DecodeQFPRegsRegisterClass(MCInst &Inst, return MCDisassembler::Fail; unsigned Reg = QFPRegDecoderTable[RegNo]; - if (Reg == (unsigned)-1) + if (Reg == ~0U) return MCDisassembler::Fail; Inst.addOperand(MCOperand::CreateReg(Reg)); return MCDisassembler::Success; |