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author | Chris Lattner <sabre@nondot.org> | 2005-05-14 23:35:21 +0000 |
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committer | Chris Lattner <sabre@nondot.org> | 2005-05-14 23:35:21 +0000 |
commit | 2b3d56ee725fd353c161bd2775e8af4ce948ca4f (patch) | |
tree | e99d0e096e8e2514b5844cc40a15ddd623dcdb11 /lib | |
parent | f5a5a6c6662cb579acd4bd45e7747d7009051b42 (diff) | |
download | llvm-2b3d56ee725fd353c161bd2775e8af4ce948ca4f.tar.gz llvm-2b3d56ee725fd353c161bd2775e8af4ce948ca4f.tar.bz2 llvm-2b3d56ee725fd353c161bd2775e8af4ce948ca4f.tar.xz |
Add some new instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22036 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
-rw-r--r-- | lib/Target/X86/X86InstrInfo.td | 7 | ||||
-rw-r--r-- | lib/Target/X86/X86RegisterInfo.cpp | 12 |
2 files changed, 17 insertions, 2 deletions
diff --git a/lib/Target/X86/X86InstrInfo.td b/lib/Target/X86/X86InstrInfo.td index 64dc14c169..d99773730d 100644 --- a/lib/Target/X86/X86InstrInfo.td +++ b/lib/Target/X86/X86InstrInfo.td @@ -191,6 +191,13 @@ let isCall = 1 in def CALL32m : I<0xFF, MRM2m, (ops i32mem:$dst), "call {*}$dst">; } +// calltarget instead of i32imm? +let isCall = 1, isTerminator = 1, isReturn = 1, isBarrier = 1 in + def TAILJMPd : IBr<0xE9, (ops i32imm:$dst), "jmp $dst">; +let isCall = 1, isTerminator = 1, isReturn = 1, isBarrier = 1 in + def TAILJMPr : I<0xFF, MRM4r, (ops R32:$dst), "jmp {*}$dst">; +let isCall = 1, isTerminator = 1, isReturn = 1, isBarrier = 1 in + def TAILJMPm : I<0xFF, MRM4m, (ops i32mem:$dst), "jmp {*}$dst">; //===----------------------------------------------------------------------===// // Miscellaneous Instructions... diff --git a/lib/Target/X86/X86RegisterInfo.cpp b/lib/Target/X86/X86RegisterInfo.cpp index 4fb5ccf5b5..a6bf007263 100644 --- a/lib/Target/X86/X86RegisterInfo.cpp +++ b/lib/Target/X86/X86RegisterInfo.cpp @@ -507,8 +507,16 @@ void X86RegisterInfo::emitEpilogue(MachineFunction &MF, const MachineFrameInfo *MFI = MF.getFrameInfo(); MachineBasicBlock::iterator MBBI = prior(MBB.end()); MachineInstr *MI; - assert((MBBI->getOpcode() == X86::RET || MBBI->getOpcode() == X86::RETI) && - "Can only insert epilog into returning blocks"); + + switch (MBBI->getOpcode()) { + case X86::RET: + case X86::RETI: + case X86::TAILJMPd: + case X86::TAILJMPr: + case X86::TAILJMPm: break; // These are ok + default: + assert(0 && "Can only insert epilog into returning blocks"); + } if (hasFP(MF)) { // Get the offset of the stack slot for the EBP register... which is |