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author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2014-06-18 22:11:03 +0000 |
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committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2014-06-18 22:11:03 +0000 |
commit | 2ea6d93c5ea813994852e35f01314ccbcec02bce (patch) | |
tree | 8b5bb150cd641971e1a34f59c2e467e4f314850b /lib | |
parent | fb2b9fb894b6c9be8a290bdf69c29f0f5511ba3c (diff) | |
download | llvm-2ea6d93c5ea813994852e35f01314ccbcec02bce.tar.gz llvm-2ea6d93c5ea813994852e35f01314ccbcec02bce.tar.bz2 llvm-2ea6d93c5ea813994852e35f01314ccbcec02bce.tar.xz |
Use stdint macros for specifying size of constants
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211231 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
-rw-r--r-- | lib/Target/R600/AMDGPUISelLowering.cpp | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/lib/Target/R600/AMDGPUISelLowering.cpp b/lib/Target/R600/AMDGPUISelLowering.cpp index fd24af0624..34c2b2bf61 100644 --- a/lib/Target/R600/AMDGPUISelLowering.cpp +++ b/lib/Target/R600/AMDGPUISelLowering.cpp @@ -1636,7 +1636,7 @@ SDValue AMDGPUTargetLowering::LowerFTRUNC(SDValue Op, SelectionDAG &DAG) const { DAG.getConstant(1023, MVT::i32)); // Extract the sign bit. - const SDValue SignBitMask = DAG.getConstant(1ul << 31, MVT::i32); + const SDValue SignBitMask = DAG.getConstant(UINT32_C(1) << 31, MVT::i32); SDValue SignBit = DAG.getNode(ISD::AND, SL, MVT::i32, Hi, SignBitMask); // Extend back to to 64-bits. @@ -1645,7 +1645,8 @@ SDValue AMDGPUTargetLowering::LowerFTRUNC(SDValue Op, SelectionDAG &DAG) const { SignBit64 = DAG.getNode(ISD::BITCAST, SL, MVT::i64, SignBit64); SDValue BcInt = DAG.getNode(ISD::BITCAST, SL, MVT::i64, Src); - const SDValue FractMask = DAG.getConstant((1LL << FractBits) - 1, MVT::i64); + const SDValue FractMask + = DAG.getConstant((UINT64_C(1) << FractBits) - 1, MVT::i64); SDValue Shr = DAG.getNode(ISD::SRA, SL, MVT::i64, FractMask, Exp); SDValue Not = DAG.getNOT(SL, Shr, MVT::i64); |