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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2014-05-22 17:45:20 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2014-05-22 17:45:20 +0000 |
| commit | 351c658fc228e92d887bbad470e20ce9bb662049 (patch) | |
| tree | a4685aac59890557e2e00e9285a5101df1fb22b6 /lib | |
| parent | c64771062bcf54f51887df75e8b06f80bfca9497 (diff) | |
| download | llvm-351c658fc228e92d887bbad470e20ce9bb662049.tar.gz llvm-351c658fc228e92d887bbad470e20ce9bb662049.tar.bz2 llvm-351c658fc228e92d887bbad470e20ce9bb662049.tar.xz | |
R600/SI: Move instruction pattern to instruction definition
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209454 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
| -rw-r--r-- | lib/Target/R600/SIInstructions.td | 9 |
1 files changed, 3 insertions, 6 deletions
diff --git a/lib/Target/R600/SIInstructions.td b/lib/Target/R600/SIInstructions.td index 76906f8692..4398151042 100644 --- a/lib/Target/R600/SIInstructions.td +++ b/lib/Target/R600/SIInstructions.td @@ -1252,7 +1252,9 @@ defm V_CVT_PKRTZ_F16_F32 : VOP2_32 <0x0000002f, "V_CVT_PKRTZ_F16_F32", let neverHasSideEffects = 1 in { defm V_MAD_LEGACY_F32 : VOP3_32 <0x00000140, "V_MAD_LEGACY_F32", []>; -defm V_MAD_F32 : VOP3_32 <0x00000141, "V_MAD_F32", []>; +defm V_MAD_F32 : VOP3_32 <0x00000141, "V_MAD_F32", + [(set f32:$dst, (fadd (fmul f32:$src0, f32:$src1), f32:$src2))] +>; defm V_MAD_I32_I24 : VOP3_32 <0x00000142, "V_MAD_I32_I24", [(set i32:$dst, (add (AMDGPUmul_i24 i32:$src0, i32:$src1), i32:$src2))] >; @@ -2076,11 +2078,6 @@ def : Pat < //===----------------------------------------------------------------------===// def : Pat < - (f32 (fadd (fmul f32:$src0, f32:$src1), f32:$src2)), - (V_MAD_F32 $src0, $src1, $src2) ->; - -def : Pat < (fadd f64:$src0, f64:$src1), (V_ADD_F64 $src0, $src1, (i64 0)) >; |