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author | Bradley Smith <bradley.smith@arm.com> | 2014-04-09 14:44:58 +0000 |
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committer | Bradley Smith <bradley.smith@arm.com> | 2014-04-09 14:44:58 +0000 |
commit | 35fb92daddc1322f8f1a1623f098eb6f28e0d149 (patch) | |
tree | 9ce9869731cf0577a1be9bbf1519a04ebe156091 /lib | |
parent | 62293d114719888731c65e5a7173a433be03482e (diff) | |
download | llvm-35fb92daddc1322f8f1a1623f098eb6f28e0d149.tar.gz llvm-35fb92daddc1322f8f1a1623f098eb6f28e0d149.tar.bz2 llvm-35fb92daddc1322f8f1a1623f098eb6f28e0d149.tar.xz |
[ARM64] Change SYS without a register to an alias to make disassembling more consistant.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205898 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
-rw-r--r-- | lib/Target/ARM64/ARM64InstrFormats.td | 16 | ||||
-rw-r--r-- | lib/Target/ARM64/ARM64InstrInfo.td | 5 | ||||
-rw-r--r-- | lib/Target/ARM64/InstPrinter/ARM64InstPrinter.cpp | 11 |
3 files changed, 10 insertions, 22 deletions
diff --git a/lib/Target/ARM64/ARM64InstrFormats.td b/lib/Target/ARM64/ARM64InstrFormats.td index 378b698909..ee82419371 100644 --- a/lib/Target/ARM64/ARM64InstrFormats.td +++ b/lib/Target/ARM64/ARM64InstrFormats.td @@ -774,22 +774,6 @@ def sys_cr_op : Operand<i32> { let ParserMatchClass = SysCRAsmOperand; } -class SystemI<bit L, string asm> - : SimpleSystemI<L, - (ins imm0_7:$op1, sys_cr_op:$Cn, sys_cr_op:$Cm, imm0_7:$op2), - asm, "\t$op1, $Cn, $Cm, $op2">, - Sched<[WriteSys]> { - bits<3> op1; - bits<4> Cn; - bits<4> Cm; - bits<3> op2; - let Inst{20-19} = 0b01; - let Inst{18-16} = op1; - let Inst{15-12} = Cn; - let Inst{11-8} = Cm; - let Inst{7-5} = op2; -} - class SystemXtI<bit L, string asm> : RtSystemI<L, (outs), (ins imm0_7:$op1, sys_cr_op:$Cn, sys_cr_op:$Cm, imm0_7:$op2, GPR64:$Rt), diff --git a/lib/Target/ARM64/ARM64InstrInfo.td b/lib/Target/ARM64/ARM64InstrInfo.td index b3baf94d41..7d319dd61e 100644 --- a/lib/Target/ARM64/ARM64InstrInfo.td +++ b/lib/Target/ARM64/ARM64InstrInfo.td @@ -332,10 +332,13 @@ def MSRcpsr: MSRcpsrI; def : Pat<(ARM64threadpointer), (MRS 0xde82)>; // Generic system instructions -def SYS : SystemI<0, "sys">; def SYSxt : SystemXtI<0, "sys">; def SYSLxt : SystemLXtI<1, "sysl">; +def : InstAlias<"sys $op1, $Cn, $Cm, $op2", + (SYSxt imm0_7:$op1, sys_cr_op:$Cn, + sys_cr_op:$Cm, imm0_7:$op2, XZR)>; + //===----------------------------------------------------------------------===// // Move immediate instructions. //===----------------------------------------------------------------------===// diff --git a/lib/Target/ARM64/InstPrinter/ARM64InstPrinter.cpp b/lib/Target/ARM64/InstPrinter/ARM64InstPrinter.cpp index 82beb6bbeb..8c0e6fa917 100644 --- a/lib/Target/ARM64/InstPrinter/ARM64InstPrinter.cpp +++ b/lib/Target/ARM64/InstPrinter/ARM64InstPrinter.cpp @@ -56,7 +56,7 @@ void ARM64InstPrinter::printInst(const MCInst *MI, raw_ostream &O, unsigned Opcode = MI->getOpcode(); - if (Opcode == ARM64::SYS || Opcode == ARM64::SYSxt) + if (Opcode == ARM64::SYSxt) if (printSysAlias(MI, O)) { printAnnotation(O, Annot); return; @@ -750,8 +750,7 @@ void ARM64AppleInstPrinter::printInst(const MCInst *MI, raw_ostream &O, bool ARM64InstPrinter::printSysAlias(const MCInst *MI, raw_ostream &O) { #ifndef NDEBUG unsigned Opcode = MI->getOpcode(); - assert((Opcode == ARM64::SYS || Opcode == ARM64::SYSxt) && - "Invalid opcode for SYS alias!"); + assert(Opcode == ARM64::SYSxt && "Invalid opcode for SYS alias!"); #endif const char *Asm = 0; @@ -961,9 +960,11 @@ bool ARM64InstPrinter::printSysAlias(const MCInst *MI, raw_ostream &O) { } if (Asm) { + unsigned Reg = MI->getOperand(4).getReg(); + O << '\t' << Asm; - if (MI->getNumOperands() == 5) - O << ", " << getRegisterName(MI->getOperand(4).getReg()); + if (StringRef(Asm).lower().find("all") == StringRef::npos) + O << ", " << getRegisterName(Reg); } return Asm != 0; |