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authorEvan Cheng <evan.cheng@apple.com>2008-09-26 19:48:35 +0000
committerEvan Cheng <evan.cheng@apple.com>2008-09-26 19:48:35 +0000
commit36a55023c1daae86afedf6e6672c0adad7bbe5ea (patch)
treec68c32e0d9f0dadb805a6e07fe7e2544b57de222 /lib
parentdbc2e856fce973243d2dfba88d573d3c88f06020 (diff)
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Fix @llvm.frameaddress codegen. FP elimination optimization should be disabled when frame address is desired. Also add support for depth > 0.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56683 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
-rw-r--r--lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp5
-rw-r--r--lib/Target/ARM/ARMRegisterInfo.cpp4
-rw-r--r--lib/Target/Alpha/AlphaRegisterInfo.cpp2
-rw-r--r--lib/Target/CellSPU/SPURegisterInfo.cpp3
-rw-r--r--lib/Target/IA64/IA64RegisterInfo.cpp4
-rw-r--r--lib/Target/Mips/MipsRegisterInfo.cpp4
-rw-r--r--lib/Target/PowerPC/PPCRegisterInfo.cpp1
-rw-r--r--lib/Target/X86/X86ISelLowering.cpp14
-rw-r--r--lib/Target/X86/X86RegisterInfo.cpp1
9 files changed, 25 insertions, 13 deletions
diff --git a/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp b/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp
index 76902505bc..bfda30ee19 100644
--- a/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp
+++ b/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp
@@ -3483,10 +3483,13 @@ SelectionDAGLowering::visitIntrinsicCall(CallInst &I, unsigned Intrinsic) {
setValue(&I, DAG.getNode(ISD::RETURNADDR, TLI.getPointerTy(),
getValue(I.getOperand(1))));
return 0;
- case Intrinsic::frameaddress:
+ case Intrinsic::frameaddress: {
+ MachineFrameInfo *MFI = CurMBB->getParent()->getFrameInfo();
+ MFI->setFrameAddressIsTaken(true);
setValue(&I, DAG.getNode(ISD::FRAMEADDR, TLI.getPointerTy(),
getValue(I.getOperand(1))));
return 0;
+ }
case Intrinsic::setjmp:
return "_setjmp"+!TLI.usesUnderscoreSetJmp();
break;
diff --git a/lib/Target/ARM/ARMRegisterInfo.cpp b/lib/Target/ARM/ARMRegisterInfo.cpp
index 7787f43ff6..d598ef68f1 100644
--- a/lib/Target/ARM/ARMRegisterInfo.cpp
+++ b/lib/Target/ARM/ARMRegisterInfo.cpp
@@ -209,7 +209,9 @@ ARMRegisterInfo::requiresRegisterScavenging(const MachineFunction &MF) const {
/// or if frame pointer elimination is disabled.
///
bool ARMRegisterInfo::hasFP(const MachineFunction &MF) const {
- return NoFramePointerElim || MF.getFrameInfo()->hasVarSizedObjects();
+ const MachineFrameInfo *MFI = MF.getFrameInfo();
+ return NoFramePointerElim || MFI->hasVarSizedObjects() ||
+ MFI->isFrameAddressTaken();
}
// hasReservedCallFrame - Under normal circumstances, when a frame pointer is
diff --git a/lib/Target/Alpha/AlphaRegisterInfo.cpp b/lib/Target/Alpha/AlphaRegisterInfo.cpp
index dd8460a065..3cef5957df 100644
--- a/lib/Target/Alpha/AlphaRegisterInfo.cpp
+++ b/lib/Target/Alpha/AlphaRegisterInfo.cpp
@@ -104,7 +104,7 @@ BitVector AlphaRegisterInfo::getReservedRegs(const MachineFunction &MF) const {
//
bool AlphaRegisterInfo::hasFP(const MachineFunction &MF) const {
const MachineFrameInfo *MFI = MF.getFrameInfo();
- return MFI->hasVarSizedObjects();
+ return MFI->hasVarSizedObjects() || MFI->isFrameAddressTaken();
}
void AlphaRegisterInfo::
diff --git a/lib/Target/CellSPU/SPURegisterInfo.cpp b/lib/Target/CellSPU/SPURegisterInfo.cpp
index 882f79f7e1..18ca7033f6 100644
--- a/lib/Target/CellSPU/SPURegisterInfo.cpp
+++ b/lib/Target/CellSPU/SPURegisterInfo.cpp
@@ -294,7 +294,8 @@ BitVector SPURegisterInfo::getReservedRegs(const MachineFunction &MF) const {
//
static bool needsFP(const MachineFunction &MF) {
const MachineFrameInfo *MFI = MF.getFrameInfo();
- return NoFramePointerElim || MFI->hasVarSizedObjects();
+ return NoFramePointerElim || MFI->hasVarSizedObjects() ||
+ MFI->isFrameAddressTaken();
}
//--------------------------------------------------------------------------
diff --git a/lib/Target/IA64/IA64RegisterInfo.cpp b/lib/Target/IA64/IA64RegisterInfo.cpp
index 848eab8ed9..0438de151f 100644
--- a/lib/Target/IA64/IA64RegisterInfo.cpp
+++ b/lib/Target/IA64/IA64RegisterInfo.cpp
@@ -75,7 +75,9 @@ BitVector IA64RegisterInfo::getReservedRegs(const MachineFunction &MF) const {
// if frame pointer elimination is disabled.
//
bool IA64RegisterInfo::hasFP(const MachineFunction &MF) const {
- return NoFramePointerElim || MF.getFrameInfo()->hasVarSizedObjects();
+ const MachineFrameInfo *MFI = MF.getFrameInfo();
+ return NoFramePointerElim || MFI->hasVarSizedObjects() ||
+ MFI->isFrameAddressTaken();
}
void IA64RegisterInfo::
diff --git a/lib/Target/Mips/MipsRegisterInfo.cpp b/lib/Target/Mips/MipsRegisterInfo.cpp
index 6d75f460d3..f09d93e04d 100644
--- a/lib/Target/Mips/MipsRegisterInfo.cpp
+++ b/lib/Target/Mips/MipsRegisterInfo.cpp
@@ -324,7 +324,9 @@ void MipsRegisterInfo::adjustMipsStackFrame(MachineFunction &MF) const
// if frame pointer elimination is disabled.
bool MipsRegisterInfo::
hasFP(const MachineFunction &MF) const {
- return (NoFramePointerElim || MF.getFrameInfo()->hasVarSizedObjects());
+ const MachineFrameInfo *MFI = MF.getFrameInfo();
+ return NoFramePointerElim || MFI->hasVarSizedObjects() ||
+ MFI->isFrameAddressTaken();
}
// This function eliminate ADJCALLSTACKDOWN,
diff --git a/lib/Target/PowerPC/PPCRegisterInfo.cpp b/lib/Target/PowerPC/PPCRegisterInfo.cpp
index 014925e1a6..155932d8d3 100644
--- a/lib/Target/PowerPC/PPCRegisterInfo.cpp
+++ b/lib/Target/PowerPC/PPCRegisterInfo.cpp
@@ -333,6 +333,7 @@ PPCRegisterInfo::getCalleeSavedRegClasses(const MachineFunction *MF) const {
static bool needsFP(const MachineFunction &MF) {
const MachineFrameInfo *MFI = MF.getFrameInfo();
return NoFramePointerElim || MFI->hasVarSizedObjects() ||
+ MFI->isFrameAddressTaken() ||
(PerformTailCallOpt && MF.getInfo<PPCFunctionInfo>()->hasFastCall());
}
diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp
index 267be34f4a..d8d5db92a0 100644
--- a/lib/Target/X86/X86ISelLowering.cpp
+++ b/lib/Target/X86/X86ISelLowering.cpp
@@ -5645,13 +5645,13 @@ SDValue X86TargetLowering::LowerRETURNADDR(SDValue Op, SelectionDAG &DAG) {
}
SDValue X86TargetLowering::LowerFRAMEADDR(SDValue Op, SelectionDAG &DAG) {
- // Depths > 0 not supported yet!
- if (cast<ConstantSDNode>(Op.getOperand(0))->getZExtValue() > 0)
- return SDValue();
-
- SDValue RetAddrFI = getReturnAddressFrameIndex(DAG);
- return DAG.getNode(ISD::SUB, getPointerTy(), RetAddrFI,
- DAG.getIntPtrConstant(TD->getPointerSize()));
+ unsigned Depth = cast<ConstantSDNode>(Op.getOperand(0))->getZExtValue();
+ unsigned FrameReg = Subtarget->is64Bit() ? X86::RBP : X86::EBP;
+ SDValue FrameAddr = DAG.getRegister(FrameReg, getPointerTy());
+ while (Depth--)
+ FrameAddr = DAG.getLoad(getPointerTy(), DAG.getEntryNode(), FrameAddr,
+ NULL, 0);
+ return FrameAddr;
}
SDValue X86TargetLowering::LowerFRAME_TO_ARGS_OFFSET(SDValue Op,
diff --git a/lib/Target/X86/X86RegisterInfo.cpp b/lib/Target/X86/X86RegisterInfo.cpp
index 49766a8fc7..d618ffdeb7 100644
--- a/lib/Target/X86/X86RegisterInfo.cpp
+++ b/lib/Target/X86/X86RegisterInfo.cpp
@@ -299,6 +299,7 @@ bool X86RegisterInfo::hasFP(const MachineFunction &MF) const {
return (NoFramePointerElim ||
needsStackRealignment(MF) ||
MFI->hasVarSizedObjects() ||
+ MFI->isFrameAddressTaken() ||
MF.getInfo<X86MachineFunctionInfo>()->getForceFramePointer() ||
(MMI && MMI->callsUnwindInit()));
}