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| author | Zoran Jovanovic <zoran.jovanovic@imgtec.com> | 2014-03-20 10:41:37 +0000 |
|---|---|---|
| committer | Zoran Jovanovic <zoran.jovanovic@imgtec.com> | 2014-03-20 10:41:37 +0000 |
| commit | 37fb9b959107ba084e097bd14347aa900e5234a4 (patch) | |
| tree | af6119315c328aef0b143a04fc0b49295ecb2a81 /lib | |
| parent | 3ac3e7451b93ee1d21380b75ad1432b9f28a076d (diff) | |
| download | llvm-37fb9b959107ba084e097bd14347aa900e5234a4.tar.gz llvm-37fb9b959107ba084e097bd14347aa900e5234a4.tar.bz2 llvm-37fb9b959107ba084e097bd14347aa900e5234a4.tar.xz | |
Provide an operand for microMIPS wait instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204329 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
| -rw-r--r-- | lib/Target/Mips/MicroMipsInstrFormats.td | 5 | ||||
| -rw-r--r-- | lib/Target/Mips/MicroMipsInstrInfo.td | 14 | ||||
| -rw-r--r-- | lib/Target/Mips/MipsInstrInfo.td | 4 |
3 files changed, 18 insertions, 5 deletions
diff --git a/lib/Target/Mips/MicroMipsInstrFormats.td b/lib/Target/Mips/MicroMipsInstrFormats.td index 1dc8f428a3..9fc2f38312 100644 --- a/lib/Target/Mips/MicroMipsInstrFormats.td +++ b/lib/Target/Mips/MicroMipsInstrFormats.td @@ -375,11 +375,12 @@ class SYS_FM_MM : MMArch { let Inst{5-0} = 0x3c; } -class WAIT_FM_MM : MMArch { +class WAIT_FM_MM { + bits<10> code_; bits<32> Inst; let Inst{31-26} = 0x00; - let Inst{25-16} = 0x00; + let Inst{25-16} = code_; let Inst{15-6} = 0x24d; let Inst{5-0} = 0x3c; } diff --git a/lib/Target/Mips/MicroMipsInstrInfo.td b/lib/Target/Mips/MicroMipsInstrInfo.td index 588eacb8f2..15be059308 100644 --- a/lib/Target/Mips/MicroMipsInstrInfo.td +++ b/lib/Target/Mips/MicroMipsInstrInfo.td @@ -95,6 +95,10 @@ class JumpLinkRegMM16<string opstr, RegisterOperand RO> : def MOVE16_MM : MoveMM16<"move", GPR32Opnd>, MOVE_FM_MM16<0x03>; def JALR16_MM : JumpLinkRegMM16<"jalr", GPR32Opnd>, JALR_FM_MM16<0x0e>; +class WaitMM<string opstr> : + InstSE<(outs), (ins uimm10:$code_), !strconcat(opstr, "\t$code_"), [], + NoItinerary, FrmOther, opstr>; + let DecoderNamespace = "MicroMips", Predicates = [InMicroMips] in { /// Arithmetic Instructions (ALU Immediate) def ADDiu_MM : MMRel, ArithLogicI<"addiu", simm16, GPR32Opnd>, @@ -257,7 +261,7 @@ let DecoderNamespace = "MicroMips", Predicates = [InMicroMips] in { def SYNC_MM : MMRel, SYNC_FT<"sync">, SYNC_FM_MM; def BREAK_MM : MMRel, BRK_FT<"break">, BRK_FM_MM; def SYSCALL_MM : MMRel, SYS_FT<"syscall">, SYS_FM_MM; - def WAIT_MM : MMRel, WAIT_FT<"wait">, WAIT_FM_MM; + def WAIT_MM : WaitMM<"wait">, WAIT_FM_MM; def ERET_MM : MMRel, ER_FT<"eret">, ER_FM_MM<0x3cd>; def DERET_MM : MMRel, ER_FT<"deret">, ER_FM_MM<0x38d>; def EI_MM : MMRel, DEI_FT<"ei", GPR32Opnd>, EI_FM_MM<0x15d>; @@ -282,3 +286,11 @@ let DecoderNamespace = "MicroMips", Predicates = [InMicroMips] in { def LL_MM : LLBaseMM<"ll", GPR32Opnd>, LL_FM_MM<0x3>; def SC_MM : SCBaseMM<"sc", GPR32Opnd>, LL_FM_MM<0xb>; } + +//===----------------------------------------------------------------------===// +// MicroMips instruction aliases +//===----------------------------------------------------------------------===// + +let Predicates = [InMicroMips] in { + def : InstAlias<"wait", (WAIT_MM 0x0), 1>; +} diff --git a/lib/Target/Mips/MipsInstrInfo.td b/lib/Target/Mips/MipsInstrInfo.td index b6ee7b1b4c..3cf59dfb28 100644 --- a/lib/Target/Mips/MipsInstrInfo.td +++ b/lib/Target/Mips/MipsInstrInfo.td @@ -1017,10 +1017,10 @@ def DERET : MMRel, ER_FT<"deret">, ER_FM<0x1f>; def EI : MMRel, DEI_FT<"ei", GPR32Opnd>, EI_FM<1>; def DI : MMRel, DEI_FT<"di", GPR32Opnd>, EI_FM<0>; -def WAIT : MMRel, WAIT_FT<"wait">, WAIT_FM; +let Predicates = [NotInMicroMips] in { +def WAIT : WAIT_FT<"wait">, WAIT_FM; /// Load-linked, Store-conditional -let Predicates = [NotInMicroMips] in { def LL : LLBase<"ll", GPR32Opnd>, LW_FM<0x30>; def SC : SCBase<"sc", GPR32Opnd>, LW_FM<0x38>; } |