summaryrefslogtreecommitdiff
path: root/lib
diff options
context:
space:
mode:
authorVikram S. Adve <vadve@cs.uiuc.edu>2002-07-10 21:45:04 +0000
committerVikram S. Adve <vadve@cs.uiuc.edu>2002-07-10 21:45:04 +0000
commit3bc9ef9317982cd7157ff29fb6bc3a60a11c3f78 (patch)
treea2ec497a0a8d7deaa1b588cd939685f6d2aded63 /lib
parent6a49a1e321b53aa3cc93d4c98abe621d957a9a4a (diff)
downloadllvm-3bc9ef9317982cd7157ff29fb6bc3a60a11c3f78.tar.gz
llvm-3bc9ef9317982cd7157ff29fb6bc3a60a11c3f78.tar.bz2
llvm-3bc9ef9317982cd7157ff29fb6bc3a60a11c3f78.tar.xz
Add support for marking each operand as a %hh, %hm, %lm or %lo.
Represent previous bools and these ones with flags in a single byte per operand. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@2860 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
-rw-r--r--lib/CodeGen/MachineInstr.cpp72
1 files changed, 38 insertions, 34 deletions
diff --git a/lib/CodeGen/MachineInstr.cpp b/lib/CodeGen/MachineInstr.cpp
index 0999272857..4fc3730658 100644
--- a/lib/CodeGen/MachineInstr.cpp
+++ b/lib/CodeGen/MachineInstr.cpp
@@ -49,9 +49,10 @@ MachineInstr::SetMachineOperandVal(unsigned int i,
{
assert(i < operands.size());
operands[i].Initialize(opType, _val);
- operands[i].isDef = isdef ||
- TargetInstrDescriptors[opCode].resultPos == (int) i;
- operands[i].isDefAndUse = isDefAndUse;
+ if (isdef || TargetInstrDescriptors[opCode].resultPos == (int) i)
+ operands[i].markDef();
+ if (isDefAndUse)
+ operands[i].markDefAndUse();
}
void
@@ -63,8 +64,6 @@ MachineInstr::SetMachineOperandConst(unsigned int i,
assert(TargetInstrDescriptors[opCode].resultPos != (int) i &&
"immed. constant cannot be defined");
operands[i].InitializeConst(operandType, intValue);
- operands[i].isDef = false;
- operands[i].isDefAndUse = false;
}
void
@@ -76,9 +75,10 @@ MachineInstr::SetMachineOperandReg(unsigned int i,
{
assert(i < operands.size());
operands[i].InitializeReg(regNum, isCCReg);
- operands[i].isDef = isdef ||
- TargetInstrDescriptors[opCode].resultPos == (int) i;
- operands[i].isDefAndUse = isDefAndUse;
+ if (isdef || TargetInstrDescriptors[opCode].resultPos == (int) i)
+ operands[i].markDef();
+ if (isDefAndUse)
+ operands[i].markDefAndUse();
regsUsed.insert(regNum);
}
@@ -101,10 +101,9 @@ static inline std::ostream &OutputValue(std::ostream &os,
{
os << "(val ";
if (val && val->hasName())
- return os << val->getName();
+ return os << val->getName() << ")";
else
- return os << (void*) val; // print address only
- os << ")";
+ return os << (void*) val << ")"; // print address only
}
std::ostream &operator<<(std::ostream& os, const MachineInstr& minstr)
@@ -134,38 +133,37 @@ std::ostream &operator<<(std::ostream& os, const MachineInstr& minstr)
return os << "\n";
}
-static inline std::ostream &OutputOperand(std::ostream &os,
- const MachineOperand &mop)
-{
- Value* val;
- switch (mop.getOperandType())
- {
- case MachineOperand::MO_CCRegister:
- case MachineOperand::MO_VirtualRegister:
- return OutputValue(os, mop.getVRegValue());
- case MachineOperand::MO_MachineRegister:
- return os << "(" << mop.getMachineRegNum() << ")";
- default:
- assert(0 && "Unknown operand type");
- return os;
- }
-}
-
std::ostream &operator<<(std::ostream &os, const MachineOperand &mop)
{
+ if (mop.opHiBits32())
+ os << "%lm(";
+ else if (mop.opLoBits32())
+ os << "%lo(";
+ else if (mop.opHiBits64())
+ os << "%hh(";
+ else if (mop.opLoBits64())
+ os << "%hm(";
+
switch(mop.opType)
{
case MachineOperand::MO_VirtualRegister:
- case MachineOperand::MO_MachineRegister:
os << "%reg";
- return OutputOperand(os, mop);
+ OutputValue(os, mop.getVRegValue());
+ break;
case MachineOperand::MO_CCRegister:
os << "%ccreg";
- return OutputOperand(os, mop);
+ OutputValue(os, mop.getVRegValue());
+ break;
+ case MachineOperand::MO_MachineRegister:
+ os << "%reg";
+ os << "(" << mop.getMachineRegNum() << ")";
+ break;
case MachineOperand::MO_SignExtendedImmed:
- return os << (long)mop.immedVal;
+ os << (long)mop.immedVal;
+ break;
case MachineOperand::MO_UnextendedImmed:
- return os << (long)mop.immedVal;
+ os << (long)mop.immedVal;
+ break;
case MachineOperand::MO_PCRelativeDisp:
{
const Value* opVal = mop.getVRegValue();
@@ -175,12 +173,18 @@ std::ostream &operator<<(std::ostream &os, const MachineOperand &mop)
os << opVal->getName();
else
os << (const void*) opVal;
- return os << ")";
+ os << ")";
+ break;
}
default:
assert(0 && "Unrecognized operand type");
break;
}
+ if (mop.flags &
+ (MachineOperand::HIFLAG32 | MachineOperand::LOFLAG32 |
+ MachineOperand::HIFLAG64 | MachineOperand::LOFLAG64))
+ os << ")";
+
return os;
}