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author | Jim Grosbach <grosbach@apple.com> | 2010-10-06 22:01:26 +0000 |
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committer | Jim Grosbach <grosbach@apple.com> | 2010-10-06 22:01:26 +0000 |
commit | 3c38f96af2a5443d9f72fd078c2c98dd08746e51 (patch) | |
tree | 2dac49465754fa30d9729a5ea76027c697ef252d /lib | |
parent | 1d6111c5ac97c321782637b2cd72e2c3e4d3d694 (diff) | |
download | llvm-3c38f96af2a5443d9f72fd078c2c98dd08746e51.tar.gz llvm-3c38f96af2a5443d9f72fd078c2c98dd08746e51.tar.bz2 llvm-3c38f96af2a5443d9f72fd078c2c98dd08746e51.tar.xz |
Clean up MOVi32imm and t2MOVi32imm pseudo instruction definitions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115853 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
-rw-r--r-- | lib/Target/ARM/ARMBaseInstrInfo.cpp | 3 | ||||
-rw-r--r-- | lib/Target/ARM/ARMInstrInfo.td | 7 | ||||
-rw-r--r-- | lib/Target/ARM/ARMInstrThumb2.td | 6 |
3 files changed, 9 insertions, 7 deletions
diff --git a/lib/Target/ARM/ARMBaseInstrInfo.cpp b/lib/Target/ARM/ARMBaseInstrInfo.cpp index 6def552e17..fcb422fcde 100644 --- a/lib/Target/ARM/ARMBaseInstrInfo.cpp +++ b/lib/Target/ARM/ARMBaseInstrInfo.cpp @@ -535,6 +535,9 @@ unsigned ARMBaseInstrInfo::GetInstSizeInBytes(const MachineInstr *MI) const { case ARMII::Size2Bytes: return 2; // Thumb1 instruction. case ARMII::SizeSpecial: { switch (Opc) { + case ARM::MOVi32imm: + case ARM::t2MOVi32imm: + return 8; case ARM::CONSTPOOL_ENTRY: // If this machine instr is a constant pool entry, its size is recorded as // operand #2. diff --git a/lib/Target/ARM/ARMInstrInfo.td b/lib/Target/ARM/ARMInstrInfo.td index 492c6401c4..893284ad1c 100644 --- a/lib/Target/ARM/ARMInstrInfo.td +++ b/lib/Target/ARM/ARMInstrInfo.td @@ -2743,10 +2743,9 @@ def : ARMPat<(add GPR:$LHS, so_neg_imm2part:$RHS), // as a single unit instead of having to handle reg inputs. // FIXME: Remove this when we can do generalized remat. let isReMaterializable = 1 in -def MOVi32imm : AI1x2<(outs GPR:$dst), (ins i32imm:$src), Pseudo, IIC_iMOVix2, - "movw", "\t$dst, ${src:lo16}\n\tmovt${p}\t$dst, ${src:hi16}", - [(set GPR:$dst, (i32 imm:$src))]>, - Requires<[IsARM, HasV6T2]>; +def MOVi32imm : PseudoInst<(outs GPR:$dst), (ins i32imm:$src), IIC_iMOVix2, "", + [(set GPR:$dst, (i32 imm:$src))]>, + Requires<[IsARM, HasV6T2]>; // ConstantPool, GlobalAddress, and JumpTable def : ARMPat<(ARMWrapper tglobaladdr :$dst), (LEApcrel tglobaladdr :$dst)>, diff --git a/lib/Target/ARM/ARMInstrThumb2.td b/lib/Target/ARM/ARMInstrThumb2.td index 87e557bf6c..f6544e37df 100644 --- a/lib/Target/ARM/ARMInstrThumb2.td +++ b/lib/Target/ARM/ARMInstrThumb2.td @@ -2710,9 +2710,9 @@ def : T2Pat<(add rGPR:$LHS, t2_so_neg_imm2part:$RHS), // This is a single pseudo instruction to make it re-materializable. // FIXME: Remove this when we can do generalized remat. let isReMaterializable = 1 in -def t2MOVi32imm : T2Ix2<(outs rGPR:$dst), (ins i32imm:$src), IIC_iMOVix2, - "movw", "\t$dst, ${src:lo16}\n\tmovt${p}\t$dst, ${src:hi16}", - [(set rGPR:$dst, (i32 imm:$src))]>; +def t2MOVi32imm : PseudoInst<(outs rGPR:$dst), (ins i32imm:$src), IIC_iMOVix2, + "", [(set rGPR:$dst, (i32 imm:$src))]>, + Requires<[IsThumb, HasV6T2]>; // ConstantPool, GlobalAddress, and JumpTable def : T2Pat<(ARMWrapper tglobaladdr :$dst), (t2LEApcrel tglobaladdr :$dst)>, |