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| author | Matheus Almeida <matheus.almeida@imgtec.com> | 2014-02-10 12:05:17 +0000 |
|---|---|---|
| committer | Matheus Almeida <matheus.almeida@imgtec.com> | 2014-02-10 12:05:17 +0000 |
| commit | 3f14ca5e3027bae10203ea02e716a1a4c6fddf80 (patch) | |
| tree | 8204d1d596830ae72feff848c04457955a25cb27 /lib | |
| parent | 5f09dd31f0220d54c32464ce7ca19b1af17ec984 (diff) | |
| download | llvm-3f14ca5e3027bae10203ea02e716a1a4c6fddf80.tar.gz llvm-3f14ca5e3027bae10203ea02e716a1a4c6fddf80.tar.bz2 llvm-3f14ca5e3027bae10203ea02e716a1a4c6fddf80.tar.xz | |
[mips][msa] Add DLSA instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201081 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
| -rw-r--r-- | lib/Target/Mips/MipsMSAInstrFormats.td | 18 | ||||
| -rw-r--r-- | lib/Target/Mips/MipsMSAInstrInfo.td | 3 | ||||
| -rw-r--r-- | lib/Target/Mips/MipsSEISelLowering.cpp | 3 |
3 files changed, 23 insertions, 1 deletions
diff --git a/lib/Target/Mips/MipsMSAInstrFormats.td b/lib/Target/Mips/MipsMSAInstrFormats.td index 3942d05914..6bd0366b52 100644 --- a/lib/Target/Mips/MipsMSAInstrFormats.td +++ b/lib/Target/Mips/MipsMSAInstrFormats.td @@ -27,6 +27,10 @@ class MSASpecial : MSAInst { let Inst{31-26} = 0b000000; } +class MSA64Special : MSA64Inst { + let Inst{31-26} = 0b000000; +} + class MSAPseudo<dag outs, dag ins, list<dag> pattern, InstrItinClass itin = IIPseudo>: MipsPseudo<outs, ins, pattern, itin> { @@ -445,3 +449,17 @@ class SPECIAL_LSA_FMT<bits<6> minor>: MSASpecial { let Inst{7-6} = sa; let Inst{5-0} = minor; } + +class SPECIAL_DLSA_FMT<bits<6> minor>: MSA64Special { + bits<5> rs; + bits<5> rt; + bits<5> rd; + bits<2> sa; + + let Inst{25-21} = rs; + let Inst{20-16} = rt; + let Inst{15-11} = rd; + let Inst{10-8} = 0b000; + let Inst{7-6} = sa; + let Inst{5-0} = minor; +} diff --git a/lib/Target/Mips/MipsMSAInstrInfo.td b/lib/Target/Mips/MipsMSAInstrInfo.td index 545bfccb88..b23cfe6005 100644 --- a/lib/Target/Mips/MipsMSAInstrInfo.td +++ b/lib/Target/Mips/MipsMSAInstrInfo.td @@ -878,6 +878,7 @@ class LDI_W_ENC : MSA_I10_FMT<0b110, 0b10, 0b000111>; class LDI_D_ENC : MSA_I10_FMT<0b110, 0b11, 0b000111>; class LSA_ENC : SPECIAL_LSA_FMT<0b000101>; +class DLSA_ENC : SPECIAL_DLSA_FMT<0b010101>; class MADD_Q_H_ENC : MSA_3RF_FMT<0b0101, 0b0, 0b011100>; class MADD_Q_W_ENC : MSA_3RF_FMT<0b0101, 0b1, 0b011100>; @@ -2324,6 +2325,7 @@ class LSA_DESC_BASE<string instr_asm, RegisterOperand RORD, } class LSA_DESC : LSA_DESC_BASE<"lsa", GPR32Opnd>; +class DLSA_DESC : LSA_DESC_BASE<"dlsa", GPR64Opnd>; class MADD_Q_H_DESC : MSA_3RF_4RF_DESC_BASE<"madd_q.h", int_mips_madd_q_h, MSA128HOpnd>; @@ -3191,6 +3193,7 @@ def LDI_W : LDI_W_ENC, LDI_W_DESC; def LDI_D : LDI_D_ENC, LDI_D_DESC; def LSA : LSA_ENC, LSA_DESC; +def DLSA : DLSA_ENC, DLSA_DESC; def MADD_Q_H : MADD_Q_H_ENC, MADD_Q_H_DESC; def MADD_Q_W : MADD_Q_W_ENC, MADD_Q_W_DESC; diff --git a/lib/Target/Mips/MipsSEISelLowering.cpp b/lib/Target/Mips/MipsSEISelLowering.cpp index aa33fab720..3d3ce0f572 100644 --- a/lib/Target/Mips/MipsSEISelLowering.cpp +++ b/lib/Target/Mips/MipsSEISelLowering.cpp @@ -1807,7 +1807,8 @@ SDValue MipsSETargetLowering::lowerINTRINSIC_WO_CHAIN(SDValue Op, case Intrinsic::mips_ldi_w: case Intrinsic::mips_ldi_d: return lowerMSASplatImm(Op, 1, DAG); - case Intrinsic::mips_lsa: { + case Intrinsic::mips_lsa: + case Intrinsic::mips_dlsa: { EVT ResTy = Op->getValueType(0); return DAG.getNode(ISD::ADD, SDLoc(Op), ResTy, Op->getOperand(1), DAG.getNode(ISD::SHL, SDLoc(Op), ResTy, |