diff options
| author | Bradley Smith <bradley.smith@arm.com> | 2014-04-09 14:44:36 +0000 |
|---|---|---|
| committer | Bradley Smith <bradley.smith@arm.com> | 2014-04-09 14:44:36 +0000 |
| commit | 42c672649ce57999db693d9f1c9995b8ffb684b4 (patch) | |
| tree | a1fac52fa8cc40d017a3db607fc1b14cec45c2bb /lib | |
| parent | 6a82fbc29ff24a77361b5f25fa19e9131926b8c2 (diff) | |
| download | llvm-42c672649ce57999db693d9f1c9995b8ffb684b4.tar.gz llvm-42c672649ce57999db693d9f1c9995b8ffb684b4.tar.bz2 llvm-42c672649ce57999db693d9f1c9995b8ffb684b4.tar.xz | |
[ARM64] Fix disassembly logic for extended loads/stores with 32-bit registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205893 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
| -rw-r--r-- | lib/Target/ARM64/Disassembler/ARM64Disassembler.cpp | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/lib/Target/ARM64/Disassembler/ARM64Disassembler.cpp b/lib/Target/ARM64/Disassembler/ARM64Disassembler.cpp index 3a1925d255..294962c5f3 100644 --- a/lib/Target/ARM64/Disassembler/ARM64Disassembler.cpp +++ b/lib/Target/ARM64/Disassembler/ARM64Disassembler.cpp @@ -1368,10 +1368,10 @@ static DecodeStatus DecodeRegOffsetLdStInstruction(llvm::MCInst &Inst, DecodeGPR64spRegisterClass(Inst, Rn, Addr, Decoder); - if (extendHi == 0x3) + if ((extendHi & 0x3) == 0x3) DecodeGPR64RegisterClass(Inst, Rm, Addr, Decoder); else - DecodeGPR64RegisterClass(Inst, Rm, Addr, Decoder); + DecodeGPR32RegisterClass(Inst, Rm, Addr, Decoder); Inst.addOperand(MCOperand::CreateImm(extend)); return Success; |