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| author | Owen Anderson <resistor@mac.com> | 2014-01-31 00:51:43 +0000 |
|---|---|---|
| committer | Owen Anderson <resistor@mac.com> | 2014-01-31 00:51:43 +0000 |
| commit | 45b07e157c0a22fec8148e0cc7243a029d4a061e (patch) | |
| tree | 69935cbcf5f174feb935582f6735de2d67416fa0 /lib | |
| parent | 21f09088d3c3d6d238c6b341d3f673feb2edc9be (diff) | |
| download | llvm-45b07e157c0a22fec8148e0cc7243a029d4a061e.tar.gz llvm-45b07e157c0a22fec8148e0cc7243a029d4a061e.tar.bz2 llvm-45b07e157c0a22fec8148e0cc7243a029d4a061e.tar.xz | |
DAGCombine should not produce ISD::OR nodes after operation legalization if they're not legal.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200503 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
| -rw-r--r-- | lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp index e96a7aaaf0..7dd85a8be7 100644 --- a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp +++ b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp @@ -1544,8 +1544,10 @@ SDValue DAGCombiner::visitADD(SDNode *N) { // If all possibly-set bits on the LHS are clear on the RHS, return an OR. // If all possibly-set bits on the RHS are clear on the LHS, return an OR. - if ((RHSZero & ~LHSZero) == ~LHSZero || (LHSZero & ~RHSZero) == ~RHSZero) - return DAG.getNode(ISD::OR, SDLoc(N), VT, N0, N1); + if ((RHSZero & ~LHSZero) == ~LHSZero || (LHSZero & ~RHSZero) == ~RHSZero){ + if (!LegalOperations || TLI.isOperationLegal(ISD::OR, VT)) + return DAG.getNode(ISD::OR, SDLoc(N), VT, N0, N1); + } } } |