Remove the X86::FP_REG_KILL pseudo-instruction and the X86FloatingPointRegKill

pass that inserted it.

It is no longer necessary to limit the live ranges of FP registers to a single
basic block.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108536 91177308-0d34-0410-b5e6-96231b3b80d8

7 files changed, 1 insertions, 182 deletions

diff --git a/lib/Target/X86/CMakeLists.txt b/lib/Target/X86/CMakeLists.txt
index 133482036c..938e158939 100644
--- a/lib/Target/X86/CMakeLists.txt
+++ b/lib/Target/X86/CMakeLists.txt
@@ -22,7 +22,6 @@ set(sources
   X86COFFMachineModuleInfo.cpp
   X86ELFWriterInfo.cpp
   X86FloatingPoint.cpp
-  X86FloatingPointRegKill.cpp
   X86ISelDAGToDAG.cpp
   X86ISelLowering.cpp
   X86InstrInfo.cpp
diff --git a/lib/Target/X86/X86.h b/lib/Target/X86/X86.h
index 677781d373..27e8850515 100644
--- a/lib/Target/X86/X86.h
+++ b/lib/Target/X86/X86.h
@@ -49,11 +49,6 @@ FunctionPass *createX86FloatingPointStackifierPass();
 /// crossings.
 FunctionPass *createSSEDomainFixPass();
 
-/// createX87FPRegKillInserterPass - This function returns a pass which
-/// inserts FP_REG_KILL instructions where needed.
-///
-FunctionPass *createX87FPRegKillInserterPass();
-
 /// createX86CodeEmitterPass - Return a pass that emits the collected X86 code
 /// to the specified MCE object.
 FunctionPass *createX86JITCodeEmitterPass(X86TargetMachine &TM,
diff --git a/lib/Target/X86/X86CodeEmitter.cpp b/lib/Target/X86/X86CodeEmitter.cpp
index f13669bd74..ed7ed14464 100644
--- a/lib/Target/X86/X86CodeEmitter.cpp
+++ b/lib/Target/X86/X86CodeEmitter.cpp
@@ -622,7 +622,6 @@ void Emitter<CodeEmitter>::emitInstruction(const MachineInstr &MI,
         
     case TargetOpcode::IMPLICIT_DEF:
     case TargetOpcode::KILL:
-    case X86::FP_REG_KILL:
       break;
     case X86::MOVPC32r: {
       // This emits the "call" portion of this pseudo instruction.
diff --git a/lib/Target/X86/X86FloatingPointRegKill.cpp b/lib/Target/X86/X86FloatingPointRegKill.cpp
deleted file mode 100644
index 2c98b96c51..0000000000
--- a/lib/Target/X86/X86FloatingPointRegKill.cpp
+++ /dev/null
@@ -1,153 +0,0 @@
-//===-- X86FloatingPoint.cpp - FP_REG_KILL inserter -----------------------===//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-//
-// This file defines the pass which inserts FP_REG_KILL instructions.
-//
-//===----------------------------------------------------------------------===//
-
-#define DEBUG_TYPE "x86-codegen"
-#include "X86.h"
-#include "X86InstrInfo.h"
-#include "llvm/Instructions.h"
-#include "llvm/CodeGen/MachineFunctionPass.h"
-#include "llvm/CodeGen/MachineInstrBuilder.h"
-#include "llvm/CodeGen/MachineRegisterInfo.h"
-#include "llvm/CodeGen/Passes.h"
-#include "llvm/Target/TargetMachine.h"
-#include "llvm/Support/Debug.h"
-#include "llvm/Support/CFG.h"
-#include "llvm/ADT/Statistic.h"
-using namespace llvm;
-
-STATISTIC(NumFPKill, "Number of FP_REG_KILL instructions added");
-
-namespace {
-  struct FPRegKiller : public MachineFunctionPass {
-    static char ID;
-    FPRegKiller() : MachineFunctionPass(&ID) {}
-
-    virtual void getAnalysisUsage(AnalysisUsage &AU) const {
-      AU.setPreservesCFG();
-      AU.addPreservedID(MachineLoopInfoID);
-      AU.addPreservedID(MachineDominatorsID);
-      MachineFunctionPass::getAnalysisUsage(AU);
-    }
-
-    virtual bool runOnMachineFunction(MachineFunction &MF);
-
-    virtual const char *getPassName() const {
-      return "X86 FP_REG_KILL inserter";
-    }
-  };
-  char FPRegKiller::ID = 0;
-}
-
-FunctionPass *llvm::createX87FPRegKillInserterPass() {
-  return new FPRegKiller();
-}
-
-/// isFPStackVReg - Return true if the specified vreg is from a fp stack
-/// register class.
-static bool isFPStackVReg(unsigned RegNo, const MachineRegisterInfo &MRI) {
-  if (!TargetRegisterInfo::isVirtualRegister(RegNo))
-    return false;
-  
-  switch (MRI.getRegClass(RegNo)->getID()) {
-  default: return false;
-  case X86::RFP32RegClassID:
-  case X86::RFP64RegClassID:
-  case X86::RFP80RegClassID:
-  return true;
-  }
-}
-
-
-/// ContainsFPStackCode - Return true if the specific MBB has floating point
-/// stack code, and thus needs an FP_REG_KILL.
-static bool ContainsFPStackCode(MachineBasicBlock *MBB,
-                                const MachineRegisterInfo &MRI) {
-  // Scan the block, looking for instructions that define or use fp stack vregs.
-  for (MachineBasicBlock::iterator I = MBB->begin(), E = MBB->end();
-       I != E; ++I) {
-    for (unsigned op = 0, e = I->getNumOperands(); op != e; ++op) {
-      if (!I->getOperand(op).isReg())
-        continue;
-      if (unsigned Reg = I->getOperand(op).getReg())
-        if (isFPStackVReg(Reg, MRI))
-          return true;
-    }
-  }
-  
-  // Check PHI nodes in successor blocks.  These PHI's will be lowered to have
-  // a copy of the input value in this block, which is a definition of the
-  // value.
-  for (MachineBasicBlock::succ_iterator SI = MBB->succ_begin(),
-       E = MBB->succ_end(); SI != E; ++ SI) {
-    MachineBasicBlock *SuccBB = *SI;
-    for (MachineBasicBlock::iterator I = SuccBB->begin(), E = SuccBB->end();
-         I != E; ++I) {
-      // All PHI nodes are at the top of the block.
-      if (!I->isPHI()) break;
-      
-      if (isFPStackVReg(I->getOperand(0).getReg(), MRI))
-        return true;
-    }
-  }
-  
-  return false;
-}                                 
-
-bool FPRegKiller::runOnMachineFunction(MachineFunction &MF) {
-  // If we are emitting FP stack code, scan the basic block to determine if this
-  // block defines or uses any FP values.  If so, put an FP_REG_KILL instruction
-  // before the terminator of the block.
-
-  // Note that FP stack instructions are used in all modes for long double,
-  // so we always need to do this check.
-  // Also note that it's possible for an FP stack register to be live across
-  // an instruction that produces multiple basic blocks (SSE CMOV) so we
-  // must check all the generated basic blocks.
-
-  // Scan all of the machine instructions in these MBBs, checking for FP
-  // stores.  (RFP32 and RFP64 will not exist in SSE mode, but RFP80 might.)
-
-  // Fast-path: If nothing is using the x87 registers, we don't need to do
-  // any scanning.
-  const MachineRegisterInfo &MRI = MF.getRegInfo();
-  if (MRI.getRegClassVirtRegs(X86::RFP80RegisterClass).empty() &&
-      MRI.getRegClassVirtRegs(X86::RFP64RegisterClass).empty() &&
-      MRI.getRegClassVirtRegs(X86::RFP32RegisterClass).empty())
-    return false;
-
-  bool Changed = false;
-  MachineFunction::iterator MBBI = MF.begin();
-  MachineFunction::iterator EndMBB = MF.end();
-  for (; MBBI != EndMBB; ++MBBI) {
-    MachineBasicBlock *MBB = MBBI;
-    
-    // If this block returns, ignore it.  We don't want to insert an FP_REG_KILL
-    // before the return.
-    if (!MBB->empty()) {
-      MachineBasicBlock::iterator EndI = MBB->end();
-      --EndI;
-      if (EndI->getDesc().isReturn())
-        continue;
-    }
-    
-    // If we find any FP stack code, emit the FP_REG_KILL instruction.
-    if (ContainsFPStackCode(MBB, MRI)) {
-      BuildMI(*MBB, MBBI->getFirstTerminator(), DebugLoc(),
-              MF.getTarget().getInstrInfo()->get(X86::FP_REG_KILL));
-      ++NumFPKill;
-      Changed = true;
-    }
-  }
-
-  return Changed;
-}
diff --git a/lib/Target/X86/X86InstrFPStack.td b/lib/Target/X86/X86InstrFPStack.td
index da93de988d..3e1598d54e 100644
--- a/lib/Target/X86/X86InstrFPStack.td
+++ b/lib/Target/X86/X86InstrFPStack.td
@@ -108,10 +108,6 @@ let usesCustomInserter = 1 in {  // Expanded after instruction selection.
                               [(X86fp_to_i64mem RFP80:$src, addr:$dst)]>;
 }
 
-let isTerminator = 1 in
-  let Defs = [FP0, FP1, FP2, FP3, FP4, FP5, FP6] in
-    def FP_REG_KILL  : I<0, Pseudo, (outs), (ins), "##FP_REG_KILL", []>;
-
 // All FP Stack operations are represented with four instructions here.  The
 // first three instructions, generated by the instruction selector, use "RFP32"
 // "RFP64" or "RFP80" registers: traditional register files to reference 32-bit,
diff --git a/lib/Target/X86/X86InstrInfo.cpp b/lib/Target/X86/X86InstrInfo.cpp
index ce471eadd7..a1d4344aac 100644
--- a/lib/Target/X86/X86InstrInfo.cpp
+++ b/lib/Target/X86/X86InstrInfo.cpp
@@ -1664,14 +1664,6 @@ bool X86InstrInfo::isUnpredicatedTerminator(const MachineInstr *MI) const {
   return !isPredicated(MI);
 }
 
-// For purposes of branch analysis do not count FP_REG_KILL as a terminator.
-static bool isBrAnalysisUnpredicatedTerminator(const MachineInstr *MI,
-                                               const X86InstrInfo &TII) {
-  if (MI->getOpcode() == X86::FP_REG_KILL)
-    return false;
-  return TII.isUnpredicatedTerminator(MI);
-}
-
 bool X86InstrInfo::AnalyzeBranch(MachineBasicBlock &MBB, 
                                  MachineBasicBlock *&TBB,
                                  MachineBasicBlock *&FBB,
@@ -1688,7 +1680,7 @@ bool X86InstrInfo::AnalyzeBranch(MachineBasicBlock &MBB,
 
     // Working from the bottom, when we see a non-terminator instruction, we're
     // done.
-    if (!isBrAnalysisUnpredicatedTerminator(I, *this))
+    if (!isUnpredicatedTerminator(I))
       break;
 
     // A terminator that isn't a branch can't easily be handled by this
@@ -3341,7 +3333,6 @@ static unsigned GetInstSizeWithDesc(const MachineInstr &MI,
       break;
     case TargetOpcode::IMPLICIT_DEF:
     case TargetOpcode::KILL:
-    case X86::FP_REG_KILL:
       break;
     case X86::MOVPC32r: {
       // This emits the "call" portion of this pseudo instruction.
diff --git a/lib/Target/X86/X86TargetMachine.cpp b/lib/Target/X86/X86TargetMachine.cpp
index 2a93a2d501..900b516441 100644
--- a/lib/Target/X86/X86TargetMachine.cpp
+++ b/lib/Target/X86/X86TargetMachine.cpp
@@ -19,15 +19,11 @@
 #include "llvm/CodeGen/Passes.h"
 #include "llvm/MC/MCCodeEmitter.h"
 #include "llvm/MC/MCStreamer.h"
-#include "llvm/Support/CommandLine.h"
 #include "llvm/Support/FormattedStream.h"
 #include "llvm/Target/TargetOptions.h"
 #include "llvm/Target/TargetRegistry.h"
 using namespace llvm;
 
-static cl::opt<bool>
-LiveX87("live-x87", cl::desc("Allow live X87 registers across blocks"));
-
 static MCAsmInfo *createMCAsmInfo(const Target &T, StringRef TT) {
   Triple TheTriple(TT);
   switch (TheTriple.getOS()) {
@@ -186,10 +182,6 @@ bool X86TargetMachine::addInstSelector(PassManagerBase &PM,
 
 bool X86TargetMachine::addPreRegAlloc(PassManagerBase &PM,
                                       CodeGenOpt::Level OptLevel) {
-  // Install a pass to insert x87 FP_REG_KILL instructions, as needed.
-  if (!LiveX87)
-    PM.add(createX87FPRegKillInserterPass());
-
   PM.add(createX86MaxStackAlignmentHeuristicPass());
   return false;  // -print-machineinstr shouldn't print after this.
 }