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| author | Rafael Espindola <rafael.espindola@gmail.com> | 2006-06-27 21:52:45 +0000 |
|---|---|---|
| committer | Rafael Espindola <rafael.espindola@gmail.com> | 2006-06-27 21:52:45 +0000 |
| commit | 49e441558760cc1708778b5d0ded05d639c1e5ed (patch) | |
| tree | 601acb30c5bdbc2560edc9bb558985ad9de92b13 /lib | |
| parent | cccef1c6fffa292c227a289d447f6b848ab56c62 (diff) | |
| download | llvm-49e441558760cc1708778b5d0ded05d639c1e5ed.tar.gz llvm-49e441558760cc1708778b5d0ded05d639c1e5ed.tar.bz2 llvm-49e441558760cc1708778b5d0ded05d639c1e5ed.tar.xz | |
handle the "mov reg1, reg2" case in isMoveInstr
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28945 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
| -rw-r--r-- | lib/Target/ARM/ARMISelDAGToDAG.cpp | 10 | ||||
| -rw-r--r-- | lib/Target/ARM/ARMInstrInfo.cpp | 14 | ||||
| -rw-r--r-- | lib/Target/ARM/ARMRegisterInfo.cpp | 2 |
3 files changed, 20 insertions, 6 deletions
diff --git a/lib/Target/ARM/ARMISelDAGToDAG.cpp b/lib/Target/ARM/ARMISelDAGToDAG.cpp index ad88be427c..413ca5959a 100644 --- a/lib/Target/ARM/ARMISelDAGToDAG.cpp +++ b/lib/Target/ARM/ARMISelDAGToDAG.cpp @@ -183,10 +183,12 @@ void ARMDAGToDAGISel::InstructionSelectBasicBlock(SelectionDAG &DAG) { ScheduleAndEmitDAG(DAG); } -static void SelectFrameIndex(SelectionDAG *CurDAG, SDOperand &Result, SDNode *N) { +static void SelectFrameIndex(SelectionDAG *CurDAG, SDOperand &Result, SDNode *N, SDOperand Op) { int FI = cast<FrameIndexSDNode>(N)->getIndex(); - Result = CurDAG->SelectNodeTo(N, ARM::movrr, MVT::i32, - CurDAG->getTargetFrameIndex(FI, MVT::i32)); + + SDOperand TFI = CurDAG->getTargetFrameIndex(FI, Op.getValueType()); + + Result = CurDAG->SelectNodeTo(N, ARM::movri, Op.getValueType(), TFI); } void ARMDAGToDAGISel::Select(SDOperand &Result, SDOperand Op) { @@ -198,7 +200,7 @@ void ARMDAGToDAGISel::Select(SDOperand &Result, SDOperand Op) { break; case ISD::FrameIndex: - SelectFrameIndex(CurDAG, Result, N); + SelectFrameIndex(CurDAG, Result, N, Op); break; } } diff --git a/lib/Target/ARM/ARMInstrInfo.cpp b/lib/Target/ARM/ARMInstrInfo.cpp index c98ea8b79d..5abe8d688d 100644 --- a/lib/Target/ARM/ARMInstrInfo.cpp +++ b/lib/Target/ARM/ARMInstrInfo.cpp @@ -27,7 +27,19 @@ ARMInstrInfo::ARMInstrInfo() /// bool ARMInstrInfo::isMoveInstr(const MachineInstr &MI, unsigned &SrcReg, unsigned &DstReg) const { - return false; + MachineOpCode oc = MI.getOpcode(); + switch (oc) { + default: + return false; + case ARM::movrr: + assert(MI.getNumOperands() == 2 && + MI.getOperand(0).isRegister() && + MI.getOperand(1).isRegister() && + "Invalid ARM MOV instruction"); + SrcReg = MI.getOperand(1).getReg();; + DstReg = MI.getOperand(0).getReg();; + return true; + } } /// isLoadFromStackSlot - If the specified machine instruction is a direct diff --git a/lib/Target/ARM/ARMRegisterInfo.cpp b/lib/Target/ARM/ARMRegisterInfo.cpp index e4ae851dd8..007b2914a1 100644 --- a/lib/Target/ARM/ARMRegisterInfo.cpp +++ b/lib/Target/ARM/ARMRegisterInfo.cpp @@ -81,7 +81,7 @@ ARMRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II) const { MachineBasicBlock &MBB = *MI.getParent(); MachineFunction &MF = *MBB.getParent(); - assert (MI.getOpcode() == ARM::movrr); + assert (MI.getOpcode() == ARM::movri); unsigned FrameIdx = 1; |