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author | Joey Gouly <joey.gouly@arm.com> | 2013-06-20 17:42:36 +0000 |
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committer | Joey Gouly <joey.gouly@arm.com> | 2013-06-20 17:42:36 +0000 |
commit | 4cbbbf49b69646ff990203ef3feae6a2726b8753 (patch) | |
tree | 52584dc3be3222ff0526fe694e3716b659e6f4d2 /lib | |
parent | d69d9f20bc3acee0fc233853745c1de015b541f2 (diff) | |
download | llvm-4cbbbf49b69646ff990203ef3feae6a2726b8753.tar.gz llvm-4cbbbf49b69646ff990203ef3feae6a2726b8753.tar.bz2 llvm-4cbbbf49b69646ff990203ef3feae6a2726b8753.tar.xz |
This reverts r155000.
The cdp2 instruction should have the same restrictions as cdp on the
co-processor registers.
VFP instructions on v8/AArch32 share the same encoding space as cdp2.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184445 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
-rw-r--r-- | lib/Target/ARM/ARMInstrInfo.td | 7 |
1 files changed, 1 insertions, 6 deletions
diff --git a/lib/Target/ARM/ARMInstrInfo.td b/lib/Target/ARM/ARMInstrInfo.td index cc17b00384..8003e5101c 100644 --- a/lib/Target/ARM/ARMInstrInfo.td +++ b/lib/Target/ARM/ARMInstrInfo.td @@ -1007,11 +1007,6 @@ def p_imm : Operand<i32> { let DecoderMethod = "DecodeCoprocessor"; } -def pf_imm : Operand<i32> { - let PrintMethod = "printPImmediate"; - let ParserMatchClass = CoprocNumAsmOperand; -} - def CoprocRegAsmOperand : AsmOperandClass { let Name = "CoprocReg"; let ParserMethod = "parseCoprocRegOperand"; @@ -4447,7 +4442,7 @@ def CDP : ABI<0b1110, (outs), (ins p_imm:$cop, imm0_15:$opc1, let Inst{23-20} = opc1; } -def CDP2 : ABXI<0b1110, (outs), (ins pf_imm:$cop, imm0_15:$opc1, +def CDP2 : ABXI<0b1110, (outs), (ins p_imm:$cop, imm0_15:$opc1, c_imm:$CRd, c_imm:$CRn, c_imm:$CRm, imm0_7:$opc2), NoItinerary, "cdp2\t$cop, $opc1, $CRd, $CRn, $CRm, $opc2", [(int_arm_cdp2 imm:$cop, imm:$opc1, imm:$CRd, imm:$CRn, |