diff options
author | Dan Gohman <gohman@apple.com> | 2009-08-20 17:11:38 +0000 |
---|---|---|
committer | Dan Gohman <gohman@apple.com> | 2009-08-20 17:11:38 +0000 |
commit | 5078f84c82814e4d33846f9ef54281619d362f8a (patch) | |
tree | 921b04304283dd557b56cc489695298c0569ae12 /lib | |
parent | b255b88f06b81523c64369fe686fedab0225de54 (diff) | |
download | llvm-5078f84c82814e4d33846f9ef54281619d362f8a.tar.gz llvm-5078f84c82814e4d33846f9ef54281619d362f8a.tar.bz2 llvm-5078f84c82814e4d33846f9ef54281619d362f8a.tar.xz |
Rename hasNoUnsignedOverflow and hasNoSignedOverflow to hasNoUnsignedWrap
and hasNoSignedWrap, for consistency with the nuw and nsw properties.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79539 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
-rw-r--r-- | lib/Analysis/ScalarEvolution.cpp | 16 | ||||
-rw-r--r-- | lib/AsmParser/LLParser.cpp | 8 | ||||
-rw-r--r-- | lib/Bitcode/Reader/BitcodeReader.cpp | 8 | ||||
-rw-r--r-- | lib/Bitcode/Writer/BitcodeWriter.cpp | 8 | ||||
-rw-r--r-- | lib/Transforms/Scalar/InstructionCombining.cpp | 2 | ||||
-rw-r--r-- | lib/VMCore/AsmWriter.cpp | 4 | ||||
-rw-r--r-- | lib/VMCore/Constants.cpp | 2 |
7 files changed, 24 insertions, 24 deletions
diff --git a/lib/Analysis/ScalarEvolution.cpp b/lib/Analysis/ScalarEvolution.cpp index 5c223a3a60..d2c3f58e9c 100644 --- a/lib/Analysis/ScalarEvolution.cpp +++ b/lib/Analysis/ScalarEvolution.cpp @@ -795,7 +795,7 @@ const SCEV *ScalarEvolution::getZeroExtendExpr(const SCEV *Op, // If we have special knowledge that this addrec won't overflow, // we don't need to do any further analysis. - if (AR->hasNoUnsignedOverflow()) + if (AR->hasNoUnsignedWrap()) return getAddRecExpr(getZeroExtendExpr(Start, Ty), getZeroExtendExpr(Step, Ty), L); @@ -934,7 +934,7 @@ const SCEV *ScalarEvolution::getSignExtendExpr(const SCEV *Op, // If we have special knowledge that this addrec won't overflow, // we don't need to do any further analysis. - if (AR->hasNoSignedOverflow()) + if (AR->hasNoSignedWrap()) return getAddRecExpr(getSignExtendExpr(Start, Ty), getSignExtendExpr(Step, Ty), L); @@ -2497,17 +2497,17 @@ const SCEV *ScalarEvolution::createNodeForPHI(PHINode *PN) { getSCEV(OBO->getOperand(1)) == PHISCEV->getStepRecurrence(*this)) { const SCEVAddRecExpr *PostInc = PHISCEV->getPostIncExpr(*this); - if (OBO->hasNoUnsignedOverflow()) { + if (OBO->hasNoUnsignedWrap()) { const_cast<SCEVAddRecExpr *>(PHISCEV) - ->setHasNoUnsignedOverflow(true); + ->setHasNoUnsignedWrap(true); const_cast<SCEVAddRecExpr *>(PostInc) - ->setHasNoUnsignedOverflow(true); + ->setHasNoUnsignedWrap(true); } - if (OBO->hasNoSignedOverflow()) { + if (OBO->hasNoSignedWrap()) { const_cast<SCEVAddRecExpr *>(PHISCEV) - ->setHasNoSignedOverflow(true); + ->setHasNoSignedWrap(true); const_cast<SCEVAddRecExpr *>(PostInc) - ->setHasNoSignedOverflow(true); + ->setHasNoSignedWrap(true); } } diff --git a/lib/AsmParser/LLParser.cpp b/lib/AsmParser/LLParser.cpp index ec7bc650c4..0b35335965 100644 --- a/lib/AsmParser/LLParser.cpp +++ b/lib/AsmParser/LLParser.cpp @@ -2082,9 +2082,9 @@ bool LLParser::ParseValID(ValID &ID) { return Error(ID.Loc,"constexpr requires integer, fp, or vector operands"); Constant *C = ConstantExpr::get(Opc, Val0, Val1); if (NUW) - cast<OverflowingBinaryOperator>(C)->setHasNoUnsignedOverflow(true); + cast<OverflowingBinaryOperator>(C)->setHasNoUnsignedWrap(true); if (NSW) - cast<OverflowingBinaryOperator>(C)->setHasNoSignedOverflow(true); + cast<OverflowingBinaryOperator>(C)->setHasNoSignedWrap(true); if (Exact) cast<SDivOperator>(C)->setIsExact(true); ID.ConstantVal = C; @@ -2665,9 +2665,9 @@ bool LLParser::ParseInstruction(Instruction *&Inst, BasicBlock *BB, return Error(ModifierLoc, "nsw only applies to integer operations"); } if (NUW) - cast<OverflowingBinaryOperator>(Inst)->setHasNoUnsignedOverflow(true); + cast<OverflowingBinaryOperator>(Inst)->setHasNoUnsignedWrap(true); if (NSW) - cast<OverflowingBinaryOperator>(Inst)->setHasNoSignedOverflow(true); + cast<OverflowingBinaryOperator>(Inst)->setHasNoSignedWrap(true); } return Result; } diff --git a/lib/Bitcode/Reader/BitcodeReader.cpp b/lib/Bitcode/Reader/BitcodeReader.cpp index ab560e786d..df171c55e7 100644 --- a/lib/Bitcode/Reader/BitcodeReader.cpp +++ b/lib/Bitcode/Reader/BitcodeReader.cpp @@ -883,10 +883,10 @@ bool BitcodeReader::ResolveGlobalAndAliasInits() { static void SetOptimizationFlags(Value *V, uint64_t Flags) { if (OverflowingBinaryOperator *OBO = dyn_cast<OverflowingBinaryOperator>(V)) { - if (Flags & (1 << bitc::OBO_NO_SIGNED_OVERFLOW)) - OBO->setHasNoSignedOverflow(true); - if (Flags & (1 << bitc::OBO_NO_UNSIGNED_OVERFLOW)) - OBO->setHasNoUnsignedOverflow(true); + if (Flags & (1 << bitc::OBO_NO_SIGNED_WRAP)) + OBO->setHasNoSignedWrap(true); + if (Flags & (1 << bitc::OBO_NO_UNSIGNED_WRAP)) + OBO->setHasNoUnsignedWrap(true); } else if (SDivOperator *Div = dyn_cast<SDivOperator>(V)) { if (Flags & (1 << bitc::SDIV_EXACT)) Div->setIsExact(true); diff --git a/lib/Bitcode/Writer/BitcodeWriter.cpp b/lib/Bitcode/Writer/BitcodeWriter.cpp index 07566a71c3..6a14cb3bbd 100644 --- a/lib/Bitcode/Writer/BitcodeWriter.cpp +++ b/lib/Bitcode/Writer/BitcodeWriter.cpp @@ -461,10 +461,10 @@ static uint64_t GetOptimizationFlags(const Value *V) { if (const OverflowingBinaryOperator *OBO = dyn_cast<OverflowingBinaryOperator>(V)) { - if (OBO->hasNoSignedOverflow()) - Flags |= 1 << bitc::OBO_NO_SIGNED_OVERFLOW; - if (OBO->hasNoUnsignedOverflow()) - Flags |= 1 << bitc::OBO_NO_UNSIGNED_OVERFLOW; + if (OBO->hasNoSignedWrap()) + Flags |= 1 << bitc::OBO_NO_SIGNED_WRAP; + if (OBO->hasNoUnsignedWrap()) + Flags |= 1 << bitc::OBO_NO_UNSIGNED_WRAP; } else if (const SDivOperator *Div = dyn_cast<SDivOperator>(V)) { if (Div->isExact()) Flags |= 1 << bitc::SDIV_EXACT; diff --git a/lib/Transforms/Scalar/InstructionCombining.cpp b/lib/Transforms/Scalar/InstructionCombining.cpp index 5fe8ee876c..cd901c0b14 100644 --- a/lib/Transforms/Scalar/InstructionCombining.cpp +++ b/lib/Transforms/Scalar/InstructionCombining.cpp @@ -3084,7 +3084,7 @@ Instruction *InstCombiner::visitSDiv(BinaryOperator &I) { if (SubOperator *Sub = dyn_cast<SubOperator>(Op0)) if (isa<Constant>(Sub->getOperand(0)) && cast<Constant>(Sub->getOperand(0))->isNullValue() && - Sub->hasNoSignedOverflow()) + Sub->hasNoSignedWrap()) return BinaryOperator::CreateSDiv(Sub->getOperand(1), ConstantExpr::getNeg(RHS)); } diff --git a/lib/VMCore/AsmWriter.cpp b/lib/VMCore/AsmWriter.cpp index c79c427ba8..9c3f76f0d0 100644 --- a/lib/VMCore/AsmWriter.cpp +++ b/lib/VMCore/AsmWriter.cpp @@ -895,9 +895,9 @@ static void WriteMDNodes(formatted_raw_ostream &Out, TypePrinting &TypePrinter, static void WriteOptimizationInfo(raw_ostream &Out, const User *U) { if (const OverflowingBinaryOperator *OBO = dyn_cast<OverflowingBinaryOperator>(U)) { - if (OBO->hasNoUnsignedOverflow()) + if (OBO->hasNoUnsignedWrap()) Out << " nuw"; - if (OBO->hasNoSignedOverflow()) + if (OBO->hasNoSignedWrap()) Out << " nsw"; } else if (const SDivOperator *Div = dyn_cast<SDivOperator>(U)) { if (Div->isExact()) diff --git a/lib/VMCore/Constants.cpp b/lib/VMCore/Constants.cpp index 12483cd9c9..7490b27729 100644 --- a/lib/VMCore/Constants.cpp +++ b/lib/VMCore/Constants.cpp @@ -634,7 +634,7 @@ Constant* ConstantExpr::getNSWAdd(Constant* C1, Constant* C2) { // Set nsw attribute, assuming constant folding didn't eliminate the // Add. if (AddOperator *Add = dyn_cast<AddOperator>(C)) - Add->setHasNoSignedOverflow(true); + Add->setHasNoSignedWrap(true); return C; } |