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author | Tim Northover <tnorthover@apple.com> | 2014-04-30 16:13:20 +0000 |
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committer | Tim Northover <tnorthover@apple.com> | 2014-04-30 16:13:20 +0000 |
commit | 50de5e4f579ef227c23964c1058cd4cc4e782682 (patch) | |
tree | 27ccd2cdac63282a919faab33a3efb830d456665 /lib | |
parent | 52f60f81d958c5ce7be81161dd6adee508605673 (diff) | |
download | llvm-50de5e4f579ef227c23964c1058cd4cc4e782682.tar.gz llvm-50de5e4f579ef227c23964c1058cd4cc4e782682.tar.bz2 llvm-50de5e4f579ef227c23964c1058cd4cc4e782682.tar.xz |
AArch64/ARM64: add specific diagnostic for MRS/MSR and enable tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207667 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
-rw-r--r-- | lib/Target/ARM64/ARM64InstrFormats.td | 2 | ||||
-rw-r--r-- | lib/Target/ARM64/AsmParser/ARM64AsmParser.cpp | 8 |
2 files changed, 9 insertions, 1 deletions
diff --git a/lib/Target/ARM64/ARM64InstrFormats.td b/lib/Target/ARM64/ARM64InstrFormats.td index cc9759e52f..ea6484985e 100644 --- a/lib/Target/ARM64/ARM64InstrFormats.td +++ b/lib/Target/ARM64/ARM64InstrFormats.td @@ -727,6 +727,7 @@ class CRmSystemI<Operand crmtype, bits<3> opc, string asm> def MRSSystemRegisterOperand : AsmOperandClass { let Name = "MRSSystemRegister"; let ParserMethod = "tryParseSysReg"; + let DiagnosticType = "MRS"; } // concatenation of 1, op0, op1, CRn, CRm, op2. 16-bit immediate. def mrs_sysreg_op : Operand<i32> { @@ -738,6 +739,7 @@ def mrs_sysreg_op : Operand<i32> { def MSRSystemRegisterOperand : AsmOperandClass { let Name = "MSRSystemRegister"; let ParserMethod = "tryParseSysReg"; + let DiagnosticType = "MSR"; } def msr_sysreg_op : Operand<i32> { let ParserMatchClass = MSRSystemRegisterOperand; diff --git a/lib/Target/ARM64/AsmParser/ARM64AsmParser.cpp b/lib/Target/ARM64/AsmParser/ARM64AsmParser.cpp index 530bab80b6..7572691fcf 100644 --- a/lib/Target/ARM64/AsmParser/ARM64AsmParser.cpp +++ b/lib/Target/ARM64/AsmParser/ARM64AsmParser.cpp @@ -3857,6 +3857,10 @@ bool ARM64AsmParser::showMatchError(SMLoc Loc, unsigned ErrCode) { return Error(Loc, "immediate must be an integer in range [1,64]."); case Match_InvalidLabel: return Error(Loc, "expected label or encodable integer pc offset"); + case Match_MRS: + return Error(Loc, "expected readable system register"); + case Match_MSR: + return Error(Loc, "expected writable system register or pstate"); case Match_MnemonicFail: return Error(Loc, "unrecognized instruction mnemonic"); default: @@ -4394,7 +4398,9 @@ bool ARM64AsmParser::MatchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode, case Match_InvalidImm1_16: case Match_InvalidImm1_32: case Match_InvalidImm1_64: - case Match_InvalidLabel: { + case Match_InvalidLabel: + case Match_MSR: + case Match_MRS: { // Any time we get here, there's nothing fancy to do. Just get the // operand SMLoc and display the diagnostic. SMLoc ErrorLoc = ((ARM64Operand *)Operands[ErrorInfo])->getStartLoc(); |